All-inorganic α-CsPbBr_(x)I_(3-x)perovskites featuring nano-sized crystallites show great potential for pure-red light-emitting diode(LED)applications.Currently,the CsPbBr_(x)I_(3-x)LEDs based on nano-sized α-CsPbBr...All-inorganic α-CsPbBr_(x)I_(3-x)perovskites featuring nano-sized crystallites show great potential for pure-red light-emitting diode(LED)applications.Currently,the CsPbBr_(x)I_(3-x)LEDs based on nano-sized α-CsPbBr_(x)I_(3-x)crystallites have been fabricated mainly via the classical colloidal route including a tedious procedure of nanocrystal synthesis,purification,ligand or anion exchange,film casting,etc.With the usually adopted conventional LED device structure,only high turn-on voltages(>2.7)have been achieved for CsPbBrxl3-x LEDs.Moreover,this mix-halide system may suffer from severe spectra-shift under bias.In this report,CsPbBr_(x)I_(3-x)thin films featuring nano-sized crystallites are prepared by incorporating multiple ammonium ligands in a one-step spin-coating route.The multiple ammonium ligands constrain the growth of CsPbBr_(x)I_(3-x)nanograins.Such CsPbBr_(x)I_(3-x)thin films benefit from quantum confinement.The corresponding CsPbBr_(x)I_(3-x)LEDs,adopting a conventional LED structure of indium-doped tin oxide(ITO)/poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate)(PEDOT:PSS)/CsPbBr_(x)I_(3-x)/[6,6]-phenyl C61 butyric acid methyl ester(PCBM)/bathocuproine(BCP)/AI,emit pure-red color at Commission Internationale de I'eclairage(CIE)coordinates of(0.709,0.290),(0.711,0.289),etc.,which represent the highest color-purity for reported pure-red perovskite LEDs and meet the Rec.2020 requirement at CIE(0.708,0.292)very well.The CsPbBr_(x)I_(3-x)LED shows a low turn-on voltage of 1.6 V,maximum external quantum efficiency of 8.94%,high luminance of 2,859 cd·m^(-2),and good color stability under bias.展开更多
A vertical junction barrier Schottky diode with a high-K/low-K compound dielectric structure is proposed and optimized to achieve a high breakdown voltage(BV).There is a discontinuity of the electric field at the inte...A vertical junction barrier Schottky diode with a high-K/low-K compound dielectric structure is proposed and optimized to achieve a high breakdown voltage(BV).There is a discontinuity of the electric field at the interface of high-K and low-K layers due to the different dielectric constants of high-K and low-K dielectric layers.A new electric field peak is introduced in the n-type drift region of junction barrier Schottky diode(JBS),so the distribution of electric field in JBS becomes more uniform.At the same time,the effect of electric-power line concentration at the p-n junction interface is suppressed due to the effects of the high-K dielectric layer and an enhancement of breakdown voltage can be achieved.Numerical simulations demonstrate that GaN JBS with a specific on-resistance(R_(on,sp)) of 2.07 mΩ·cm^(2) and a BV of 4171 V which is 167% higher than the breakdown voltage of the common structure,resulting in a high figure-of-merit(FOM) of 8.6 GW/cm^(2),and a low turn-on voltage of 0.6 V.展开更多
Two broadband detectors at W-band and D-band are analyzed and designed with low barrier Schottky diodes. The input circuit of the detectors is realized by low and high impedance microstrip lines, and their output circ...Two broadband detectors at W-band and D-band are analyzed and designed with low barrier Schottky diodes. The input circuit of the detectors is realized by low and high impedance microstrip lines, and their output circuit is composed of a radio frequency （RF） bandstop filter and a tuning line for optimum reflection phase of the RF signal. S-parameters of the complete circuit are exported to a circuit simulator for voltage sensitivity analysis. For the W band detectors, the highest measured voltage sensitivity is 11800 mV/mW at 100 GHz, and the sensitivity is higher than 2000 mV/mW in 80-104 GHz. Measured tangential sensitivity （TSS） is higher than -38 dBm, and its linearity is superior than 0.99992 at 95 GHz. For the D band detector, the highest measured voltage sensitivity is 1600 mV/mW, and the typical sensitivity is 600 mV/mW in 110-170 GHz. TSS is higher than -29 dBm, and its linearity is superior than 0.99961 at 150 GHz.展开更多
A vertical GaN field-effect transistor with an integrated self-adapted channel diode(CD-FET)is proposed to improve the reverse conduction performance.It features a channel diode(CD)formed between a trench source on th...A vertical GaN field-effect transistor with an integrated self-adapted channel diode(CD-FET)is proposed to improve the reverse conduction performance.It features a channel diode(CD)formed between a trench source on the insulator and a P-type barrier layer(PBL),together with a P-shield layer under the trench gate.At forward conduction,the CD is pinched off due to depletion effects caused by both the PBL and the metal-insulator-semiconductor structure from the trench source,without influencing the on-state characteristic of the CD-FET.At reverse conduction,the depletion region narrows and thus the CD turns on to achieve a very low turn-on voltage(V_(F)),preventing the inherent body diode from turning on.Meanwhile,the PBL and P-shield layer can modulate the electric field distribution to improve the off-state breakdown voltage(BV).Moreover,the P-shield not only shields the gate from a high electric field but also transforms part of C_(GD)to CGS so as to significantly reduce the gate charge(Q_(GD)),leading to a low switching loss(E_(switch)).Consequently,the proposed CD-FET achieves a low V_(F)of 1.65 V and a high BV of 1446 V,and V_(F),Q_(GD)and E_(switch)of the CD-FET are decreased by 49%,55%and 80%,respectively,compared with those of a conventional metal-oxide-semiconductor field-effect transistor(MOSFET).展开更多
The origin of the efficiency drop of quantum dot light-emitting diode(QLED)under consecutive voltage sweeps is still a puzzle.In this work,we report the voltage sweep behavior of QLED.We observed the efficiency drop o...The origin of the efficiency drop of quantum dot light-emitting diode(QLED)under consecutive voltage sweeps is still a puzzle.In this work,we report the voltage sweep behavior of QLED.We observed the efficiency drop of red QLED with ZnMgO electron transport layer(ETL)under consecutive voltage sweeps.In contrast,the efficiency increases for ZnO ETL device.By analyzing the electrical characteristics of both devices and surface traps of ZnMgO and ZnO nanoparticles,we found the efficiency drop of ZnMgO device is related to the hole leakage mediated by trap state on ZnMgO nanoparticles.For ZnO device,the efficiency raise is due to suppressed electron leakage.The hole leakage also causes rapid lifetime degradation of ZnMgO device.However,the efficiency and lifetime degradation of ZnMgO device can be eliminated with shelf aging.Our work reveals the distinct voltage sweep behavior of QLED based on different ETLs and may help to understand the lifetime degradation mechanism in QLED.展开更多
The comparison of domestic and foreign studies has been utilized to extensively employ junction termination extension(JTE)structures for power devices.However,achieving a gradual doping concentration change in the lat...The comparison of domestic and foreign studies has been utilized to extensively employ junction termination extension(JTE)structures for power devices.However,achieving a gradual doping concentration change in the lateral direction is difficult for SiC devices since the diffusion constants of the implanted aluminum ions in SiC are much less than silicon.Many previously reported studies adopted many new structures to solve this problem.Additionally,the JTE structure is strongly sensitive to the ion implantation dose.Thus,GA-JTE,double-zone etched JTE structures,and SM-JTE with modulation spacing were reported to overcome the above shortcomings of the JTE structure and effectively increase the breakdown voltage.They provided a theoretical basis for fabricating terminal structures of 4H-SiC PiN diodes.This paper summarized the effects of different terminal structures on the electrical properties of SiC devices at home and abroad.Presently,the continuous development and breakthrough of terminal technology have significantly improved the breakdown voltage and terminal efficiency of 4H-SiC PiN power diodes.展开更多
By introducing a thin p-type layer between the Schottky metal and n-GaN layer, this work presents a Schottky-pn junction diode(SPND) configuration for the GaN rectifier fabrication. Specific unipolar carrier conductio...By introducing a thin p-type layer between the Schottky metal and n-GaN layer, this work presents a Schottky-pn junction diode(SPND) configuration for the GaN rectifier fabrication. Specific unipolar carrier conduction characteristic is demonstrated by the verification of temperature-dependent current–voltage(I–V) tests and electroluminescence spectra.Meanwhile, apparently advantageous forward conduction properties as compared to the pn diode fabricated on the same wafer have been achieved, featuring a lower turn-on voltage of 0.82 V. Together with the analysis model established in the GaN SPND for a wide-range designable turn-on voltage, this work provides an alternative method to the GaN rectifier strategies besides the traditional solution.展开更多
A design of a high-speed multi-core processor with compact size is a trending approach in the Integrated Circuits(ICs)fabrication industries.Because whenever device size comes down into narrow,designers facing many po...A design of a high-speed multi-core processor with compact size is a trending approach in the Integrated Circuits(ICs)fabrication industries.Because whenever device size comes down into narrow,designers facing many power den-sity issues should be reduced by scaling threshold voltage and supply voltage.Initially,Complementary Metal Oxide Semiconductor(CMOS)technology sup-ports power saving up to 32 nm gate length,but further scaling causes short severe channel effects such as threshold voltage swing,mobility degradation,and more leakage power(less than 32)at gate length.Hence,it directly affects the arithmetic logic unit(ALU),which suffers a significant power density of the scaled multi-core architecture.Therefore,it losses reliability features to get overheating and increased temperature.This paper presents a novel power mini-mization technique for active 4-bit ALU operations using Fin Field Effect Tran-sistor(FinFET)at 22 nm technology.Based on this,a diode is directly connected to the load transistor,and it is active only at the saturation region as a function.Thereby,the access transistor can cutoff of the leakage current,and sleep transis-tors control theflow of leakage current corresponding to each instant ALU opera-tion.The combination of transistors(access and sleep)reduces the leakage current from micro to nano-ampere.Further,the power minimization is achieved by con-necting the number of transistors(6T and 10T)of the FinFET structure to ALU with 22 nm technology.For simulation concerns,a Tanner(T-Spice)with 22 nm technology implements the proposed design,which reduces threshold vol-tage swing,supply power,leakage current,gate length delay,etc.As a result,it is quite suitable for the ALU architecture of a high-speed multi-core processor.展开更多
基金the Energy Materials and Surface Sciences Unit of the Okinawa Institute of Science and Technology Graduate University(OIST),the OIST Proof of Concept(POC)Program,the OIST R&D Cluster Research Program,and the Japan Society for the Promotion of Science(JSPS)Grants-in-Aid for Scientific Research[KAKENHI](No.JP18K05266).
文摘All-inorganic α-CsPbBr_(x)I_(3-x)perovskites featuring nano-sized crystallites show great potential for pure-red light-emitting diode(LED)applications.Currently,the CsPbBr_(x)I_(3-x)LEDs based on nano-sized α-CsPbBr_(x)I_(3-x)crystallites have been fabricated mainly via the classical colloidal route including a tedious procedure of nanocrystal synthesis,purification,ligand or anion exchange,film casting,etc.With the usually adopted conventional LED device structure,only high turn-on voltages(>2.7)have been achieved for CsPbBrxl3-x LEDs.Moreover,this mix-halide system may suffer from severe spectra-shift under bias.In this report,CsPbBr_(x)I_(3-x)thin films featuring nano-sized crystallites are prepared by incorporating multiple ammonium ligands in a one-step spin-coating route.The multiple ammonium ligands constrain the growth of CsPbBr_(x)I_(3-x)nanograins.Such CsPbBr_(x)I_(3-x)thin films benefit from quantum confinement.The corresponding CsPbBr_(x)I_(3-x)LEDs,adopting a conventional LED structure of indium-doped tin oxide(ITO)/poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate)(PEDOT:PSS)/CsPbBr_(x)I_(3-x)/[6,6]-phenyl C61 butyric acid methyl ester(PCBM)/bathocuproine(BCP)/AI,emit pure-red color at Commission Internationale de I'eclairage(CIE)coordinates of(0.709,0.290),(0.711,0.289),etc.,which represent the highest color-purity for reported pure-red perovskite LEDs and meet the Rec.2020 requirement at CIE(0.708,0.292)very well.The CsPbBr_(x)I_(3-x)LED shows a low turn-on voltage of 1.6 V,maximum external quantum efficiency of 8.94%,high luminance of 2,859 cd·m^(-2),and good color stability under bias.
基金Project supported by the National Natural Science Foundation of China (Grant No.61376078)the Natural Science Foundation of Sichuan Province,China (Grant No.2022NSFSC0515)。
文摘A vertical junction barrier Schottky diode with a high-K/low-K compound dielectric structure is proposed and optimized to achieve a high breakdown voltage(BV).There is a discontinuity of the electric field at the interface of high-K and low-K layers due to the different dielectric constants of high-K and low-K dielectric layers.A new electric field peak is introduced in the n-type drift region of junction barrier Schottky diode(JBS),so the distribution of electric field in JBS becomes more uniform.At the same time,the effect of electric-power line concentration at the p-n junction interface is suppressed due to the effects of the high-K dielectric layer and an enhancement of breakdown voltage can be achieved.Numerical simulations demonstrate that GaN JBS with a specific on-resistance(R_(on,sp)) of 2.07 mΩ·cm^(2) and a BV of 4171 V which is 167% higher than the breakdown voltage of the common structure,resulting in a high figure-of-merit(FOM) of 8.6 GW/cm^(2),and a low turn-on voltage of 0.6 V.
文摘Two broadband detectors at W-band and D-band are analyzed and designed with low barrier Schottky diodes. The input circuit of the detectors is realized by low and high impedance microstrip lines, and their output circuit is composed of a radio frequency （RF） bandstop filter and a tuning line for optimum reflection phase of the RF signal. S-parameters of the complete circuit are exported to a circuit simulator for voltage sensitivity analysis. For the W band detectors, the highest measured voltage sensitivity is 11800 mV/mW at 100 GHz, and the sensitivity is higher than 2000 mV/mW in 80-104 GHz. Measured tangential sensitivity （TSS） is higher than -38 dBm, and its linearity is superior than 0.99992 at 95 GHz. For the D band detector, the highest measured voltage sensitivity is 1600 mV/mW, and the typical sensitivity is 600 mV/mW in 110-170 GHz. TSS is higher than -29 dBm, and its linearity is superior than 0.99961 at 150 GHz.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61874149 and U20A20208)the Outstanding Youth Science and Technology Foundation of China(Grant No.2018-JCJQ-ZQ-060).
文摘A vertical GaN field-effect transistor with an integrated self-adapted channel diode(CD-FET)is proposed to improve the reverse conduction performance.It features a channel diode(CD)formed between a trench source on the insulator and a P-type barrier layer(PBL),together with a P-shield layer under the trench gate.At forward conduction,the CD is pinched off due to depletion effects caused by both the PBL and the metal-insulator-semiconductor structure from the trench source,without influencing the on-state characteristic of the CD-FET.At reverse conduction,the depletion region narrows and thus the CD turns on to achieve a very low turn-on voltage(V_(F)),preventing the inherent body diode from turning on.Meanwhile,the PBL and P-shield layer can modulate the electric field distribution to improve the off-state breakdown voltage(BV).Moreover,the P-shield not only shields the gate from a high electric field but also transforms part of C_(GD)to CGS so as to significantly reduce the gate charge(Q_(GD)),leading to a low switching loss(E_(switch)).Consequently,the proposed CD-FET achieves a low V_(F)of 1.65 V and a high BV of 1446 V,and V_(F),Q_(GD)and E_(switch)of the CD-FET are decreased by 49%,55%and 80%,respectively,compared with those of a conventional metal-oxide-semiconductor field-effect transistor(MOSFET).
基金supported by Key-Area Research and Development Program of Guangdong Province(Nos.2019B010925001 and 2019B010924001)Guangdong University Key Laboratory for Advanced Quantum Dot Displays and Lighting(No.2017KSYS007).
文摘The origin of the efficiency drop of quantum dot light-emitting diode(QLED)under consecutive voltage sweeps is still a puzzle.In this work,we report the voltage sweep behavior of QLED.We observed the efficiency drop of red QLED with ZnMgO electron transport layer(ETL)under consecutive voltage sweeps.In contrast,the efficiency increases for ZnO ETL device.By analyzing the electrical characteristics of both devices and surface traps of ZnMgO and ZnO nanoparticles,we found the efficiency drop of ZnMgO device is related to the hole leakage mediated by trap state on ZnMgO nanoparticles.For ZnO device,the efficiency raise is due to suppressed electron leakage.The hole leakage also causes rapid lifetime degradation of ZnMgO device.However,the efficiency and lifetime degradation of ZnMgO device can be eliminated with shelf aging.Our work reveals the distinct voltage sweep behavior of QLED based on different ETLs and may help to understand the lifetime degradation mechanism in QLED.
基金financially supported by the Scientific and Technology Project of State Grid Corporation of China,Research on Dry Etching Forming Technology of Silicon Carbide Device,Project No.5500-202158437A-0-0-00.
文摘The comparison of domestic and foreign studies has been utilized to extensively employ junction termination extension(JTE)structures for power devices.However,achieving a gradual doping concentration change in the lateral direction is difficult for SiC devices since the diffusion constants of the implanted aluminum ions in SiC are much less than silicon.Many previously reported studies adopted many new structures to solve this problem.Additionally,the JTE structure is strongly sensitive to the ion implantation dose.Thus,GA-JTE,double-zone etched JTE structures,and SM-JTE with modulation spacing were reported to overcome the above shortcomings of the JTE structure and effectively increase the breakdown voltage.They provided a theoretical basis for fabricating terminal structures of 4H-SiC PiN diodes.This paper summarized the effects of different terminal structures on the electrical properties of SiC devices at home and abroad.Presently,the continuous development and breakthrough of terminal technology have significantly improved the breakdown voltage and terminal efficiency of 4H-SiC PiN power diodes.
基金supported by the National Natural Science Foundation of China (Grant Nos. U2141241, 62004099, 61921005,and 91850112)。
文摘By introducing a thin p-type layer between the Schottky metal and n-GaN layer, this work presents a Schottky-pn junction diode(SPND) configuration for the GaN rectifier fabrication. Specific unipolar carrier conduction characteristic is demonstrated by the verification of temperature-dependent current–voltage(I–V) tests and electroluminescence spectra.Meanwhile, apparently advantageous forward conduction properties as compared to the pn diode fabricated on the same wafer have been achieved, featuring a lower turn-on voltage of 0.82 V. Together with the analysis model established in the GaN SPND for a wide-range designable turn-on voltage, this work provides an alternative method to the GaN rectifier strategies besides the traditional solution.
文摘A design of a high-speed multi-core processor with compact size is a trending approach in the Integrated Circuits(ICs)fabrication industries.Because whenever device size comes down into narrow,designers facing many power den-sity issues should be reduced by scaling threshold voltage and supply voltage.Initially,Complementary Metal Oxide Semiconductor(CMOS)technology sup-ports power saving up to 32 nm gate length,but further scaling causes short severe channel effects such as threshold voltage swing,mobility degradation,and more leakage power(less than 32)at gate length.Hence,it directly affects the arithmetic logic unit(ALU),which suffers a significant power density of the scaled multi-core architecture.Therefore,it losses reliability features to get overheating and increased temperature.This paper presents a novel power mini-mization technique for active 4-bit ALU operations using Fin Field Effect Tran-sistor(FinFET)at 22 nm technology.Based on this,a diode is directly connected to the load transistor,and it is active only at the saturation region as a function.Thereby,the access transistor can cutoff of the leakage current,and sleep transis-tors control theflow of leakage current corresponding to each instant ALU opera-tion.The combination of transistors(access and sleep)reduces the leakage current from micro to nano-ampere.Further,the power minimization is achieved by con-necting the number of transistors(6T and 10T)of the FinFET structure to ALU with 22 nm technology.For simulation concerns,a Tanner(T-Spice)with 22 nm technology implements the proposed design,which reduces threshold vol-tage swing,supply power,leakage current,gate length delay,etc.As a result,it is quite suitable for the ALU architecture of a high-speed multi-core processor.
