Wide bandgap(WBG)semiconductors,such as silicon carbide(SiC)and gallium nitride(GaN),exhibit superior physical properties and demonstrate great potential for replacing conventional silicon(Si)semiconductors with WBG t...Wide bandgap(WBG)semiconductors,such as silicon carbide(SiC)and gallium nitride(GaN),exhibit superior physical properties and demonstrate great potential for replacing conventional silicon(Si)semiconductors with WBG technology,pushing the boundaries of power devices to handle higher blocking voltages,switching frequencies,output power levels,and operating temperatures.However,tradeoffs in switching performance and converter efficiency when substituting GaN devices for Si and SiC counterparts are not well-defined,especially in a cascode configuration.Additional research with further detailed investigation and analysis is necessitated for medium-voltage GaN devices in power converter applications.Therefore,the aim of this research is to experimentally investigate the impact of emerging 650/900 V cascode GaN devices on bidirectional dc-dc converters that are suitable for energy storage and distributed renewable energy systems.Dynamic characteristics of Si,SiC,and cascode GaN power devices are examined through the double-pulse test(DPT)circuit at different gate resistance values,device currents,and DC bus voltages.Furthermore,the switching behavior and energy loss as well as the rate of voltage and current changes over the time are studied and analyzed at various operating conditions.A 500 W experimental converter prototype is implemented to validate the benefits of cascode GaN devices on the converter operation and performance.Comprehensive analysis of the power losses and efficiency improvements for Si-based,SiC-based,and GaN-based converters are performed and evaluated as the switching frequency,working temperature,and output power level are in-creased.The experimental results reveal significant improvements in switching performance and energy efficiency from the emerging cascode GaN devices in the bidirectional converters.展开更多
利用等效1 MeV中子和γ射线对1200 V SiC功率MOSFET进行辐射,研究了电离损伤和位移损伤对器件的影响,并分析了辐射后器件栅氧长期可靠性。结果表明:中子辐射后器件导通电阻发生明显退化,与辐射引入近界面缺陷降低载流子寿命和载流子迁...利用等效1 MeV中子和γ射线对1200 V SiC功率MOSFET进行辐射,研究了电离损伤和位移损伤对器件的影响,并分析了辐射后器件栅氧长期可靠性。结果表明:中子辐射后器件导通电阻发生明显退化,与辐射引入近界面缺陷降低载流子寿命和载流子迁移率有关。时间依赖的介质击穿(TDDB)结果表明,栅泄漏电流呈现先增加后降低趋势,与空穴捕获和电子捕获效应有关。中子辐射后栅漏电演化形式未改变,但氧化层击穿时间增加,这是中子辐射缺陷增加了Fowler-Nordheim(FN)隧穿势垒的缘故。总剂量辐射在器件氧化层内引入陷阱电荷,使得器件阈值电压负向漂移。随后的TDDB测试表明,与中子辐射一致,总剂量辐射未改变栅漏电演化形式,但氧化层击穿时间提前。这是总剂量辐射在氧化层内引入额外空穴陷阱和中性电子陷阱的缘故。展开更多
Compared to Si devices,the junction temperature of SiC devices is more critical due to the reliability concern introduced by immature packaging technology applied to new material.This paper proposes a practical SiC MO...Compared to Si devices,the junction temperature of SiC devices is more critical due to the reliability concern introduced by immature packaging technology applied to new material.This paper proposes a practical SiC MOSFET junction temperature monitoring method based on the on-state voltage$\\boldsymbol{V}_{\\mathbf{ds}(\\mathbf{on})}$measurement.In Section II of the paper,the temperature sensitivity of the on-state voltage$\\boldsymbol{V}_{\\mathbf{ds}(\\mathbf{on})}$is characterized.The hardware of the measurement system is set up in Section III,which consists of an On-state Voltage Measurement Circuit(OVMC),the sampling and isolation circuit.Next,a calibration method based on the self-heating of the SiC MOSFET chip is presented in Section IV.In the final Section,the junction temperature is monitored synchronously according to the calibration results.The proposed method is applied to a Buck converter and verified by both an Infrared Radiation(IR)camera and a Finite Element Analysis(FEA)tool.展开更多
A new ultralow gate–drain charge(Q_(GD)) 4 H-SiC trench MOSFET is presented and its mechanism is investigated by simulation. The novel MOSFET features double shielding structures(DS-MOS): one is the grounded split ga...A new ultralow gate–drain charge(Q_(GD)) 4 H-SiC trench MOSFET is presented and its mechanism is investigated by simulation. The novel MOSFET features double shielding structures(DS-MOS): one is the grounded split gate(SG), the other is the P+shielding region(PSR). Both the SG and the PSR reduce the coupling effect between the gate and the drain, and transform the most part of the gate–drain capacitance(C_(GD)) into the gate–source capacitance(C_(GS)) and drain–source capacitance(C_(DS)) in series.Thus the C_(GD) is reduced and the proposed DS-MOS obtains ultralow Q_(GD). Compared with the double-trench MOSFET(DT-MOS)and the conventional trench MOSFET(CT-MOS), the proposed DS-MOS decreases the Q_(GD) by 85% and 81%, respectively.Moreover, the figure of merit(FOM), defined as the product of specific on-resistance(R_(on, sp)) and Q_(GD)(R_(on, sp)Q_(GD)), is reduced by 84% and 81%, respectively.展开更多
文摘Wide bandgap(WBG)semiconductors,such as silicon carbide(SiC)and gallium nitride(GaN),exhibit superior physical properties and demonstrate great potential for replacing conventional silicon(Si)semiconductors with WBG technology,pushing the boundaries of power devices to handle higher blocking voltages,switching frequencies,output power levels,and operating temperatures.However,tradeoffs in switching performance and converter efficiency when substituting GaN devices for Si and SiC counterparts are not well-defined,especially in a cascode configuration.Additional research with further detailed investigation and analysis is necessitated for medium-voltage GaN devices in power converter applications.Therefore,the aim of this research is to experimentally investigate the impact of emerging 650/900 V cascode GaN devices on bidirectional dc-dc converters that are suitable for energy storage and distributed renewable energy systems.Dynamic characteristics of Si,SiC,and cascode GaN power devices are examined through the double-pulse test(DPT)circuit at different gate resistance values,device currents,and DC bus voltages.Furthermore,the switching behavior and energy loss as well as the rate of voltage and current changes over the time are studied and analyzed at various operating conditions.A 500 W experimental converter prototype is implemented to validate the benefits of cascode GaN devices on the converter operation and performance.Comprehensive analysis of the power losses and efficiency improvements for Si-based,SiC-based,and GaN-based converters are performed and evaluated as the switching frequency,working temperature,and output power level are in-creased.The experimental results reveal significant improvements in switching performance and energy efficiency from the emerging cascode GaN devices in the bidirectional converters.
文摘利用等效1 MeV中子和γ射线对1200 V SiC功率MOSFET进行辐射,研究了电离损伤和位移损伤对器件的影响,并分析了辐射后器件栅氧长期可靠性。结果表明:中子辐射后器件导通电阻发生明显退化,与辐射引入近界面缺陷降低载流子寿命和载流子迁移率有关。时间依赖的介质击穿(TDDB)结果表明,栅泄漏电流呈现先增加后降低趋势,与空穴捕获和电子捕获效应有关。中子辐射后栅漏电演化形式未改变,但氧化层击穿时间增加,这是中子辐射缺陷增加了Fowler-Nordheim(FN)隧穿势垒的缘故。总剂量辐射在器件氧化层内引入陷阱电荷,使得器件阈值电压负向漂移。随后的TDDB测试表明,与中子辐射一致,总剂量辐射未改变栅漏电演化形式,但氧化层击穿时间提前。这是总剂量辐射在氧化层内引入额外空穴陷阱和中性电子陷阱的缘故。
基金supported by the National Key R&D Program of China(2016YFB0100600)the Key Program of Bureau of Frontier Sciences and Education,Chinese Academy of Sciences(QYZDBSSW-JSC044)。
文摘Compared to Si devices,the junction temperature of SiC devices is more critical due to the reliability concern introduced by immature packaging technology applied to new material.This paper proposes a practical SiC MOSFET junction temperature monitoring method based on the on-state voltage$\\boldsymbol{V}_{\\mathbf{ds}(\\mathbf{on})}$measurement.In Section II of the paper,the temperature sensitivity of the on-state voltage$\\boldsymbol{V}_{\\mathbf{ds}(\\mathbf{on})}$is characterized.The hardware of the measurement system is set up in Section III,which consists of an On-state Voltage Measurement Circuit(OVMC),the sampling and isolation circuit.Next,a calibration method based on the self-heating of the SiC MOSFET chip is presented in Section IV.In the final Section,the junction temperature is monitored synchronously according to the calibration results.The proposed method is applied to a Buck converter and verified by both an Infrared Radiation(IR)camera and a Finite Element Analysis(FEA)tool.
基金supported by the National Key Research and Development Program of China(No.2016YFB0400502)
文摘A new ultralow gate–drain charge(Q_(GD)) 4 H-SiC trench MOSFET is presented and its mechanism is investigated by simulation. The novel MOSFET features double shielding structures(DS-MOS): one is the grounded split gate(SG), the other is the P+shielding region(PSR). Both the SG and the PSR reduce the coupling effect between the gate and the drain, and transform the most part of the gate–drain capacitance(C_(GD)) into the gate–source capacitance(C_(GS)) and drain–source capacitance(C_(DS)) in series.Thus the C_(GD) is reduced and the proposed DS-MOS obtains ultralow Q_(GD). Compared with the double-trench MOSFET(DT-MOS)and the conventional trench MOSFET(CT-MOS), the proposed DS-MOS decreases the Q_(GD) by 85% and 81%, respectively.Moreover, the figure of merit(FOM), defined as the product of specific on-resistance(R_(on, sp)) and Q_(GD)(R_(on, sp)Q_(GD)), is reduced by 84% and 81%, respectively.
