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龙芯3号互联系统的设计与实现 被引量:22
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作者 王焕东 高翔 +1 位作者 陈云霁 胡伟武 《计算机研究与发展》 EI CSCD 北大核心 2008年第12期2001-2010,共10页
龙芯3号的互联结构设计采用了一种基于二维Mesh的可伸缩分布式多核结构,可为芯片级、主板级和系统级的互联提供统一的拓扑结构和逻辑设计.龙芯3号的对外接口采用扩展的HyperTransport协议,既可以用于连接IO,又可以实现多芯片的互联.在龙... 龙芯3号的互联结构设计采用了一种基于二维Mesh的可伸缩分布式多核结构,可为芯片级、主板级和系统级的互联提供统一的拓扑结构和逻辑设计.龙芯3号的对外接口采用扩展的HyperTransport协议,既可以用于连接IO,又可以实现多芯片的互联.在龙芯3号的互联结构中还设置了软件路由配置机制,可以在板级直接构筑中等规模的CC-NUMA系统和更大规模的NCC-NUMA系统,提供高效的通信机制.介绍了基于龙芯3号的多处理器系统互联架构.采用了双层可伸缩互联结构:片内由二维Mesh连接多个结点,结点内由交叉开关连接多个处理器核和二级缓存模块.片间无需额外硬件支持即可通过支持缓存一致性的HyperTransport接口实现16核的多处理器系统.利用层次化目录技术,龙芯3号还可以支持更大规模的多处理器系统.龙芯3号的互联架构为搭建简洁、高效、灵活、高度可扩展的共享存储多处理器系统提供了有力支持. 展开更多
关键词 龙芯3号 多核 多片 体系结构 互联 处理器
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MEMS封装技术 被引量:10
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作者 陈一梅 黄元庆 《传感器技术》 CSCD 北大核心 2005年第3期7-9,12,共4页
介绍了微机电(MEMS)封装技术,包括晶片级封装、单芯片封装和多芯片封装、模块式封装与倒装焊3种很有前景的封装技术。指出了MEMS封装的几个可靠性问题,最后,对MEMS封装的发展趋势作了分析。
关键词 微机电封装 单芯片 多芯片 模块 晶片级 倒装焊
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3D-printed facet-attached microlenses for advanced photonic system assembly 被引量:4
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作者 Yilin Xu Pascal Maier +15 位作者 Mareike Trappen Philipp-Immanuel Dietrich Matthias Blaicher Rokas Jutas Achim Weber Torben Kind Colin Dankwart Jens Stephan Andreas Steffan Amin Abbasi Padraic Morrissey Kamil Gradkowski Brian Kelly Peter O’Brien Wolfgang Freude Christian Koos 《Light(Advanced Manufacturing)》 2023年第2期1-17,共17页
Wafer-level mass production of photonic integrated circuits(PIC)has become a technological mainstay in the field of optics and photonics,enabling many novel and disrupting a wide range of existing applications.However... Wafer-level mass production of photonic integrated circuits(PIC)has become a technological mainstay in the field of optics and photonics,enabling many novel and disrupting a wide range of existing applications.However,scalable photonic packaging and system assembly still represents a major challenge that often hinders commercial adoption of PIC-based solutions.Specifically,chip-to-chip and fiber-to-chip connections often rely on so-called active alignment techniques,where the coupling efficiency is continuously measured and optimized during the assembly process.This unavoidably leads to technically complex assembly processes and high cost,thereby eliminating most of the inherent scalability advantages of PIC-based solutions.In this paper,we demonstrate that 3D-printed facet-attached microlenses(FaML)can overcome this problem by opening an attractive path towards highly scalable photonic system assembly,relying entirely on passive assembly techniques based on industry-standard machine vision and/or simple mechanical stops.FaML can be printed with high precision to the facets of optical components using multi-photon lithography,thereby offering the possibility to shape the emitted beams by freely designed refractive or reflective surfaces.Specifically,the emitted beams can be collimated to a comparatively large diameter that is independent of the device-specific mode fields,thereby relaxing both axial and lateral alignment tolerances.Moreover,the FaML concept allows to insert discrete optical elements such as optical isolators into the free-space beam paths between PIC facets.We show the viability and the versatility of the scheme in a series of selected experiments of high technical relevance,comprising pluggable fiber-chip interfaces,the combination of PIC with discrete micro-optical elements such as polarization beam splitters,as well as coupling with ultra-low back-reflection based on non-planar beam paths that only comprise tilted optical surfaces.Based on our results,we believe that the FaML concept opens an 展开更多
关键词 Photonic integration Photonic assembly Photonic packaging Additive laser manufacturing multi-photon lithography Facet-attached microlenses Optical alignment tolerances Fiber-chip coupling Hybrid multi-chip modules
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A Hybrid Integrated and Low-Cost Multi-Chip Broadband Doherty Power Amplifier Module for 5G Massive MIMO Application
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作者 Fei Huang Guansheng Lv +2 位作者 Huibo Wu Wenhua Chen Zhenghe Feng 《Engineering》 SCIE EI CAS CSCD 2024年第7期223-232,共10页
In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabric... In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabricated using the gallium arsenide(GaAs)integrated passive device(IPD)process,is proposed for 5G massive multiple-input multiple-output(MIMO)application.An inverted DPA structure with a low-Q output network is proposed to achieve better bandwidth performance,and a single-driver architecture is adopted for a chip with high gain and small area.The proposed DPA has a bandwidth of 4.4-5.0 GHz that can achieve a saturation of more than 45.0 dBm.The gain compression from 37 dBm to saturation power is less than 4 dB,and the average power-added efficiency(PAE)is 36.3%with an 8.5 dB peak-to-average power ratio(PAPR)in 4.5-5.0 GHz.The measured adjacent channel power ratio(ACPR)is better than50 dBc after digital predistortion(DPD),exhibiting satisfactory linearity. 展开更多
关键词 5G Doherty power amplifier multi-input multi-output multi-chip modules Hybrid integrated
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多芯片组件(MCM)技术 被引量:5
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作者 盖红星 王静 王宝友 《信息技术与标准化》 2008年第5期26-29,共4页
概述了多芯片组件技术的发展,介绍了多芯片技术基本类型及组装方法、三维多芯片组件以及多芯片组件的发展和重点应用领域。
关键词 封装 组件 多芯片
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Rate of Phase Difference Change Estimation in Single Airborne Passive Locating System 被引量:5
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作者 王军虎 王永生 +2 位作者 郭涛 王洪浩 王强 《Chinese Journal of Aeronautics》 SCIE EI CAS CSCD 2009年第2期184-190,共7页
As an important parameter in the single airborne passive locating system, the rate of phase difference change contains range information of the radio emitter. Taking single carrier sine pulse signals as an example, th... As an important parameter in the single airborne passive locating system, the rate of phase difference change contains range information of the radio emitter. Taking single carrier sine pulse signals as an example, this article illustrates the principle of passive location through measurement of rates of phase difference change and analyzes the structure of measurement errors. On the basis of the Cramér-Rao lower bound (CRLB), an algorithm associated with time-chips is proposed to determine the rates of pha... 展开更多
关键词 LOCATION rate of phase difference change Cramér-Rao lower bound phase discrimination multi-chip processing
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多芯片高精度固晶设备控制系统设计
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作者 马轶博 丁宇心 段晋胜 《科技创新与生产力》 2024年第7期91-93,共3页
本文指出固晶是集成电路半导体后道封装工艺中的重要环节,作为该工艺的实现设备,高精度固晶机对半导体后道封装产品的良品率起着至关重要的作用。国内现有高精度固晶机多为进口设备,存在交货周期长、售后服务不到位且存在随时对中国禁... 本文指出固晶是集成电路半导体后道封装工艺中的重要环节,作为该工艺的实现设备,高精度固晶机对半导体后道封装产品的良品率起着至关重要的作用。国内现有高精度固晶机多为进口设备,存在交货周期长、售后服务不到位且存在随时对中国禁运的风险,针对以上问题,中国电子科技集团公司第二研究所自主研制的多芯片高精度固晶机,实现了高精度固晶贴片设备的自主可控。本文重点阐述多芯片高精度固晶机的控制系统设计。 展开更多
关键词 多芯片 高精度 固晶 运动控制器 上位机
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多芯片高精度点胶贴片机技术发展趋势 被引量:1
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作者 曹国斌 甘琨 田志峰 《山西电子技术》 2023年第4期105-107,共3页
基于多芯片高精度点胶贴片机应用背景,对目前国内市面主流的多芯片点胶贴片机从用户需求、技术指标差异进行分析,对未来多芯片高精度点胶贴片技术发展趋势做出分析研判。
关键词 多芯片 高精度 点胶贴片机
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基于多芯片封装的半导体激光器热特性 被引量:4
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作者 王文 褚金雷 +3 位作者 高欣 张晶 乔忠良 薄报学 《强激光与粒子束》 EI CAS CSCD 北大核心 2014年第1期80-85,共6页
设计了一种由12只单条形芯片分为2组以从高到低阶梯排列的百瓦级半导体激光器结构。针对其在稳态工作条件下的热特性利用ANSYS软件进行了模拟分析,通过改变Cu热沉的宽度、间距和高度差,得到了最高和最低Cu热沉封装的芯片有源区温度及两... 设计了一种由12只单条形芯片分为2组以从高到低阶梯排列的百瓦级半导体激光器结构。针对其在稳态工作条件下的热特性利用ANSYS软件进行了模拟分析,通过改变Cu热沉的宽度、间距和高度差,得到了最高和最低Cu热沉封装的芯片有源区温度及两者温度差值的变化规律。最后设计了一种较为理想的百W级半导体激光器的散热结构。 展开更多
关键词 多芯片 半导体激光器 稳态 有源区温度
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基于柔性基板的异构多芯片三维封装散热仿真与优化设计 被引量:3
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作者 武晓萌 刘丰满 +7 位作者 马鹤 庞诚 何毅 吴鹏 张童龙 虞国良 李晨 于大全 《科学技术与工程》 北大核心 2014年第19期238-242,共5页
随着移动终端的广泛应用,射频多芯片系统封装结构的小型化、系统的集成化将导致功率密度的直线上升,同时,芯片各异性的特点将产生温度分布不均的现象,从而催生亟需解决的热管理问题。针对包含5款芯片的典型的射频前端系统,在POP封装基础... 随着移动终端的广泛应用,射频多芯片系统封装结构的小型化、系统的集成化将导致功率密度的直线上升,同时,芯片各异性的特点将产生温度分布不均的现象,从而催生亟需解决的热管理问题。针对包含5款芯片的典型的射频前端系统,在POP封装基础上,提出柔性基板封装结构设计方案,并应用ANSYS ICEPAK三维数值分析法进行仿真计算,验证得到如下结果:1柔板同层的温差降低到POP结构的6%,异层的温差降低到POP结构的4%,避免了热点的出现;2柔板封装结温随下层屏蔽罩的厚度增大而减小,但尺寸的变化对其影响相对较小;3与铝基相比,铜屏蔽罩能够起到更好的散热作用。研究结果为射频异构多芯片三维封装优化设计提供了参考方案。 展开更多
关键词 多芯片 POP封装 柔性基板 热设计 三维仿真
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Antenna-in-package system integrated with meander line antenna based on LTCC technology 被引量:1
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作者 Gang DONG Wei XIONG +1 位作者 Zhao-yao WU Yin-tang YANG 《Frontiers of Information Technology & Electronic Engineering》 SCIE EI CSCD 2016年第1期67-73,共7页
We present an antenna-in-package system integrated with a meander line antenna based on low temperature co-fired ceramic(LTCC) technology. The proposed system employs a meander line patch antenna, a packaging layer, a... We present an antenna-in-package system integrated with a meander line antenna based on low temperature co-fired ceramic(LTCC) technology. The proposed system employs a meander line patch antenna, a packaging layer, and a laminated multi-chip module(MCM) for integration of integrated circuit(IC) bare chips.A microstrip feed line is used to reduce the interaction between patch and package. To decrease electromagnetic coupling, a via hole structure is designed and analyzed. The meander line antenna achieved a bandwidth of 220 MHz with the center frequency at 2.4 GHz, a maximum gain of 2.2 d B, and a radiation efficiency about 90% over its operational frequency. The whole system, with a small size of 20.2 mm×6.1 mm×2.6 mm, can be easily realized by a standard LTCC process. This antenna-in-package system integrated with a meander line antenna was fabricated and the experimental results agreed with simulations well. 展开更多
关键词 Antenna-in-package(Ai P) Meander line antenna multi-chip module(MCM) Low temperature co-fired ceramic(LTCC)
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LED结温检测方法的分析 被引量:2
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作者 文官富 《集成电路应用》 2019年第7期44-45,共2页
基于大功率LED结温测量方法,研究被测LED器件注入方波电流脉冲过程中电流幅度与工作流量之间的比值。发现实际额定电流与冲脉电流比值相同。通过直接测量LED在额定工作电流下的正向结电压,并辅助温度敏感系数,就能够测得LED的结温。
关键词 集成封装 多芯片 LED结温 正向电压 脉冲电流法
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白光LED研究进展 被引量:1
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作者 韩颖姝 杨燕 裴亚芳 《中国照明电器》 2014年第7期25-27,31,共4页
从单芯片无荧光粉和多芯片无荧光粉两方面介绍不使用荧光粉的白光LED;从单芯片加荧光粉和多芯片加荧光粉两个方面介绍使用荧光粉构造的白光LED,供研究者详细了解近年白光LED的研究状况。
关键词 白光 LED 荧光粉 单芯片 多芯片
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Self-adaptive phosphor coating technology for wafer-level scale chip packaging
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作者 周琳淞 饶海波 +5 位作者 王伟 万贤龙 廖骏源 王雪梅 周炟 雷巧林 《Journal of Semiconductors》 EI CAS CSCD 2013年第5期96-99,共4页
A new self-adaptive phosphor coating technology has been successfully developed, which adopted a slurry method combined with a self-exposure process. A phosphor suspension in the water-soluble photoresist was applied ... A new self-adaptive phosphor coating technology has been successfully developed, which adopted a slurry method combined with a self-exposure process. A phosphor suspension in the water-soluble photoresist was applied and exposed to LED blue light itself and developed to form a conformal phosphor coating with self- adaptability to the angular distribution of intensity of blue light and better-performing spatial color uniformity. The self-adaptive phosphor coating technology had been successfully adopted in the wafer surface to realize a wafer- level scale phosphor conformal coating. The first-stage experiments show satisfying results and give an adequate demonstration of the flexibility of self-adaptive coating technology on application of WLSCP. 展开更多
关键词 white light-emitting diodes self-adaptive conformal coating wafer level encapsulation technology multi-chip packaging
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Study on MCM Interconnect Test Generation Based on Ant Algorithm with Mutation Operator
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作者 陈雷 《上海交通大学学报》 EI CAS CSCD 北大核心 2007年第S2期150-153,共4页
A novel multi-chip module(MCM) interconnect test generation scheme based on ant algorithm(AA) with mutation operator was presented.By combing the characteristics of MCM interconnect test generation,the pheromone updat... A novel multi-chip module(MCM) interconnect test generation scheme based on ant algorithm(AA) with mutation operator was presented.By combing the characteristics of MCM interconnect test generation,the pheromone updating rule and state transition rule of AA is designed.Using mutation operator,this scheme overcomes ordinary AA’s defects of slow convergence speed,easy to get stagnate,and low ability of full search.The international standard MCM benchmark circuit provided by the MCNC group was used to verify the approach.The results of simulation experiments,which compare to the results of standard ant algorithm,genetic algorithm(GA) and other deterministic interconnecting algorithms,show that the proposed scheme can achieve high fault coverage,compact test set and short CPU time,that it is a newer optimized method deserving research. 展开更多
关键词 multi-chip module(MCM) INTERCONNECT TEST ANT algorithm(AA) TEST generation MUTATION
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结构形式对多芯片子系统激光密封质量的影响 被引量:1
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作者 禹胜林 薛松柏 +2 位作者 严伟 纪宣 朱小军 《焊接学报》 EI CAS CSCD 北大核心 2014年第5期79-82,117,共5页
利用激光焊接的优点,采用ANSYS软件对多芯片子系统Al-50Si壳体与盖板(4047铝合金)激光密封的结构进行分析,并进行了实物验证.结果表明,结构形式是影响多芯片子系统激光密封质量的关键因素,方形结构激光焊缝应力比异形结构高出36%以上(根... 利用激光焊接的优点,采用ANSYS软件对多芯片子系统Al-50Si壳体与盖板(4047铝合金)激光密封的结构进行分析,并进行了实物验证.结果表明,结构形式是影响多芯片子系统激光密封质量的关键因素,方形结构激光焊缝应力比异形结构高出36%以上(根据ANSYS分析结果),实物验证的方形结构激光焊缝气密性比异形结构低一个数量级.其原因是激光焊接后,方形结构的焊缝因焊接应力产生了焊接裂纹,影响了焊缝的气密性.采用Al-50%Si复合材料制作的多芯片子系统壳体与4047铝合金盖板异形接头形式,可以有效地降低激光焊缝的应力,从而避免焊接裂纹的产生.结果表明,异形结构的焊缝氦泄漏率可以达到8.9×10-9Pa·m3/s,满足了多芯片子系统壳体气密封装要求. 展开更多
关键词 多芯片 铝硅合金 激光焊接 泄漏率
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集成电路并行测试适配器设计技术
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作者 侯政嘉 刘炜 +1 位作者 石志刚 吉国凡 《微处理机》 2007年第6期13-14,共2页
重点研究集成电路并行测试适配器的设计技术。通过利用布局布线、阻抗匹配、分割电源和地的平面等项技术解决了多管芯之间的相互隔离、信号同步等问题。
关键词 并行测试适配器 多管芯 PCB板设计
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混合功率运放结壳热阻测试方法研究
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作者 孟碧云 陆定红 阳秋光 《电子质量》 2019年第1期5-8,共4页
在目前对半导体二极管热阻测试的基础上,通过分析多芯片功率运放的电路原理图、芯片生产工艺以及封装结构,提出了一种多芯片混合功率运放结壳热阻测试方法,在没有额外在芯片内部设计专门的热阻测试电路得基础上,实现了多芯片功率运放结... 在目前对半导体二极管热阻测试的基础上,通过分析多芯片功率运放的电路原理图、芯片生产工艺以及封装结构,提出了一种多芯片混合功率运放结壳热阻测试方法,在没有额外在芯片内部设计专门的热阻测试电路得基础上,实现了多芯片功率运放结壳热阻的测试。 展开更多
关键词 多芯片 功率运放 热阻测试
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多芯片贴片式LED器件结温测量
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作者 刘东月 彭浩 +2 位作者 茹志芹 黄杰 徐立生 《电子工艺技术》 2013年第3期145-147,180,共4页
结温是多芯片LED器件热性能的关键参数。以SMD5050 LED器件为例,研究了多芯片贴片式LED器件结温测量方法。SMD5050 LED是一种多芯片贴片式封装的LED器件,器件内封装有3颗芯片,3颗芯片之间并联。根据单芯片LED器件热阻测试原理,模拟SMD50... 结温是多芯片LED器件热性能的关键参数。以SMD5050 LED器件为例,研究了多芯片贴片式LED器件结温测量方法。SMD5050 LED是一种多芯片贴片式封装的LED器件,器件内封装有3颗芯片,3颗芯片之间并联。根据单芯片LED器件热阻测试原理,模拟SMD5050 LED器件正常工作时的状态,对SMD5050 LED器件的结温进行了测量,并根据LED芯片特性,验证了测量结果的准确性,这种方法适用于封装结构相似的其他多芯片LED器件结温的测量。 展开更多
关键词 5050LED 多芯片 结温 测量
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An Improved Planar Module Automatic Layout Method for Large Number of Dies
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作者 Puqi Ning Xuhui Wen +1 位作者 Lei Li Han Cao 《CES Transactions on Electrical Machines and Systems》 2017年第4期411-417,共7页
The layout of power modules is one of the key points in power module design,especially for silicon carbide module,which may parallel more devices compared with silicon counterpart.In this paper,along with the design e... The layout of power modules is one of the key points in power module design,especially for silicon carbide module,which may parallel more devices compared with silicon counterpart.In this paper,along with the design example,a improved layout design method for planar power modules is presented.Some practical considerations and implementations are also introduced in the optimization of module layout design. 展开更多
关键词 multi-chip module packaging.
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