针对建筑师缺乏关于定制化装配式建筑制造与装配的技术认知与研究前置等问题,文章旨在通过面向制造与装配的设计(DfMA)理论探索,建构适用于建筑领域的Df M A策略。策略研究分实施基础、面向制造的设计(DfM)和面向装配的设计(DfA)三部分...针对建筑师缺乏关于定制化装配式建筑制造与装配的技术认知与研究前置等问题,文章旨在通过面向制造与装配的设计(DfMA)理论探索,建构适用于建筑领域的Df M A策略。策略研究分实施基础、面向制造的设计(DfM)和面向装配的设计(DfA)三部分,并基于莲花之居进行实践验证以形成实施框架,从而为建筑师提供面向定制化装配式建筑的DfMA策略指导与设计建造流程参考。展开更多
This paper presents a multilevel hypergraph partitioning method that balances constraints on not only the cell area but also the wire weight with a partition-based global placement algorithm that maximizes the wire de...This paper presents a multilevel hypergraph partitioning method that balances constraints on not only the cell area but also the wire weight with a partition-based global placement algorithm that maximizes the wire density uniformity to control chemical-mechanical polishing （CMP） variations. The multilevel partitioning alternately uses two FM variants in the refinement stage to give a more uniform wire distribution. The global placement is based on a top-down recursive bisection framework. The partitioning algorithm is used in the bisectioning to impact the wire density uniformity. Tests show that, with a 10% constraint, the partitioning produces solutions with more balanced edge weights that are 837% better than from hMetis, 1039.1% better than MLPart, and 762.9% better than FM in terms of imbalance proportion and that this global placement algorithm improves ROOSTER with a more uniform wire distribution by 3.1% on average with an increased wire length of only 3.0%.展开更多
This paper overviews design for manufacturing （DFM） for IC design in nano-CMOS technologies. Process/device issues relevant to the manufacturability of ICs in advanced CMOS technologies will be presented first befor...This paper overviews design for manufacturing （DFM） for IC design in nano-CMOS technologies. Process/device issues relevant to the manufacturability of ICs in advanced CMOS technologies will be presented first before an exploration on process/device modeling for DFM is done. The discussion also covers a brief introduction of DFM-aware of design flow and EDA efforts to better handle the design-manufacturing interface in very large scale IC design environment.展开更多
文摘针对建筑师缺乏关于定制化装配式建筑制造与装配的技术认知与研究前置等问题,文章旨在通过面向制造与装配的设计(DfMA)理论探索,建构适用于建筑领域的Df M A策略。策略研究分实施基础、面向制造的设计(DfM)和面向装配的设计(DfA)三部分,并基于莲花之居进行实践验证以形成实施框架,从而为建筑师提供面向定制化装配式建筑的DfMA策略指导与设计建造流程参考。
基金Supported by the National Natural Science Foundation of China(Nos. 60876026 and 60833004)
文摘This paper presents a multilevel hypergraph partitioning method that balances constraints on not only the cell area but also the wire weight with a partition-based global placement algorithm that maximizes the wire density uniformity to control chemical-mechanical polishing （CMP） variations. The multilevel partitioning alternately uses two FM variants in the refinement stage to give a more uniform wire distribution. The global placement is based on a top-down recursive bisection framework. The partitioning algorithm is used in the bisectioning to impact the wire density uniformity. Tests show that, with a 10% constraint, the partitioning produces solutions with more balanced edge weights that are 837% better than from hMetis, 1039.1% better than MLPart, and 762.9% better than FM in terms of imbalance proportion and that this global placement algorithm improves ROOSTER with a more uniform wire distribution by 3.1% on average with an increased wire length of only 3.0%.
基金the National Natural Science Foundation of China (Grant No. 60736030)
文摘This paper overviews design for manufacturing （DFM） for IC design in nano-CMOS technologies. Process/device issues relevant to the manufacturability of ICs in advanced CMOS technologies will be presented first before an exploration on process/device modeling for DFM is done. The discussion also covers a brief introduction of DFM-aware of design flow and EDA efforts to better handle the design-manufacturing interface in very large scale IC design environment.
