模型检查是一种用于并发系统的性质验证的算法技术.LTLC(linear temporal logic with clocks)是一种连续时间时序逻辑,它是线性时序逻辑LTL的一种实时扩充.讨论实时系统关于LTLC公式的模型检查问题,将实时系统关于LTLC公式的模型检查化...模型检查是一种用于并发系统的性质验证的算法技术.LTLC(linear temporal logic with clocks)是一种连续时间时序逻辑,它是线性时序逻辑LTL的一种实时扩充.讨论实时系统关于LTLC公式的模型检查问题,将实时系统关于LTLC公式的模型检查化归为有穷状态转换系统关于LTL公式的模型检查,从而可以利用LTL的模型检查工具来对LTLC进行模型检查.由于LTLC既能表示实时系统的性质,又能表示实时系统的实现,这就使得时序逻辑LTLC的模型检查过程既能用于实时系统的性质验证,又能用于实时系统之间的一致性验证.展开更多
Fault analysis is a frequently used side-channel attack for cryptanalysis.However,existing fault attack methods usually involve complex fault fusion analysis or computation-intensive statistical analysis of massive fa...Fault analysis is a frequently used side-channel attack for cryptanalysis.However,existing fault attack methods usually involve complex fault fusion analysis or computation-intensive statistical analysis of massive fault traces.In this work,we take a property-based formal verification approach to fault analysis.We derive fine-grained formal models for automatic fault propagation and fusion,which establish a mathematical foundation for precise measurement and formal reasoning of fault effects.We extract the correlations in fault effects in order to create properties for fault verification.We further propose a method for key recovery,by formally checking when the extracted properties can be satisfied with partial keys as the search variables.Experimental results using both unprotected and masked advanced encryption standard(AES)implementations show that our method has a key search complexity of 216,which only requires two correct and faulty ciphertext pairs to determine the secret key,and does not assume knowledge about fault location or pattern.展开更多
文摘模型检查是一种用于并发系统的性质验证的算法技术.LTLC(linear temporal logic with clocks)是一种连续时间时序逻辑,它是线性时序逻辑LTL的一种实时扩充.讨论实时系统关于LTLC公式的模型检查问题,将实时系统关于LTLC公式的模型检查化归为有穷状态转换系统关于LTL公式的模型检查,从而可以利用LTL的模型检查工具来对LTLC进行模型检查.由于LTLC既能表示实时系统的性质,又能表示实时系统的实现,这就使得时序逻辑LTLC的模型检查过程既能用于实时系统的性质验证,又能用于实时系统之间的一致性验证.
基金supported by the Annual Key Scientific Research Foundations of Anhui Province,China(08020203005,07020203003)Major Scientific and Technological Project of Anhui Province,China(08010202124)~~
基金supported by the National Key R&D Program of China(No.2021YFB3100901)the National Natural Science Foundation of China(Nos.62074131 and 62004176).
文摘Fault analysis is a frequently used side-channel attack for cryptanalysis.However,existing fault attack methods usually involve complex fault fusion analysis or computation-intensive statistical analysis of massive fault traces.In this work,we take a property-based formal verification approach to fault analysis.We derive fine-grained formal models for automatic fault propagation and fusion,which establish a mathematical foundation for precise measurement and formal reasoning of fault effects.We extract the correlations in fault effects in order to create properties for fault verification.We further propose a method for key recovery,by formally checking when the extracted properties can be satisfied with partial keys as the search variables.Experimental results using both unprotected and masked advanced encryption standard(AES)implementations show that our method has a key search complexity of 216,which only requires two correct and faulty ciphertext pairs to determine the secret key,and does not assume knowledge about fault location or pattern.
