This paper proposed an X-band 6-bit passive phase shifter （PS） designed in 0.18 μm silicon-on-insulator （SOI） CMOS technology, which solves the key problem of high integration degree, low power, and a small size ...This paper proposed an X-band 6-bit passive phase shifter （PS） designed in 0.18 μm silicon-on-insulator （SOI） CMOS technology, which solves the key problem of high integration degree, low power, and a small size T/R module. The switched-topology is employed to achieve broadband and fiat phase shift. The ESD circuit and driver are also integrated in the PS. It covers the frequency band from 7.5 to 10.5 GHz with an EMS phase error less than 7.5%. The input and output VSWRs are less than 2 and the insertion loss （IL） is between 8-14 dB across the 7.5 to 10.5 GHz, with a maximum IL difference of 4 dB. The input 1 dB compression point （IP1dB） is 20 dBm.展开更多
In this paper, we present a new voltage-mode biquad filter that uses a six-terminal CMOS fully differential current conveyor(FDCCII). The FDCCII with only 23 transistors in its structure and operating at ± 1.5 V,...In this paper, we present a new voltage-mode biquad filter that uses a six-terminal CMOS fully differential current conveyor(FDCCII). The FDCCII with only 23 transistors in its structure and operating at ± 1.5 V, is based on a class AB fully differential buffer. The proposed filter has the facility to tune gain, ωo and Q. A circuit division circuit(CDC) is employed to digitally control the FDCCII block. This digitally controlled FDCCII is used to realize a new reconfigurable fully-differential integrator and differentiator. We performed SPICE simulations to determine the performance of all circuits using CMOS 0.25 μm technology.展开更多
文摘This paper proposed an X-band 6-bit passive phase shifter （PS） designed in 0.18 μm silicon-on-insulator （SOI） CMOS technology, which solves the key problem of high integration degree, low power, and a small size T/R module. The switched-topology is employed to achieve broadband and fiat phase shift. The ESD circuit and driver are also integrated in the PS. It covers the frequency band from 7.5 to 10.5 GHz with an EMS phase error less than 7.5%. The input and output VSWRs are less than 2 and the insertion loss （IL） is between 8-14 dB across the 7.5 to 10.5 GHz, with a maximum IL difference of 4 dB. The input 1 dB compression point （IP1dB） is 20 dBm.
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文摘In this paper, we present a new voltage-mode biquad filter that uses a six-terminal CMOS fully differential current conveyor(FDCCII). The FDCCII with only 23 transistors in its structure and operating at ± 1.5 V, is based on a class AB fully differential buffer. The proposed filter has the facility to tune gain, ωo and Q. A circuit division circuit(CDC) is employed to digitally control the FDCCII block. This digitally controlled FDCCII is used to realize a new reconfigurable fully-differential integrator and differentiator. We performed SPICE simulations to determine the performance of all circuits using CMOS 0.25 μm technology.
