数字接收系统中,对输入的射频信号直接中频采样后进行数字下变频(Digital Down Converter,DDC),有效减少了硬件模拟设备的数量,提高了系统的可靠性和稳定性。针对高速数字下变频存在的采样率高、资源消耗高等难点,利用滤波器系数的对称...数字接收系统中,对输入的射频信号直接中频采样后进行数字下变频(Digital Down Converter,DDC),有效减少了硬件模拟设备的数量,提高了系统的可靠性和稳定性。针对高速数字下变频存在的采样率高、资源消耗高等难点,利用滤波器系数的对称性特点设计了一种在不降低处理速度的前提下,减少现场可编程门阵列(Field ProgrammableGate Array,FPGA)内部处理单元个数,实现功耗降低的有限冲击响应(Finite Impulse Response,FIR)滤波器,并在FPGA中得到了实现。实验结果表明,该方法性能优异,可大幅节省资源,具有较高的工程实用价值。展开更多
The relationship between the hardware requirement of digital down converters（DDCs）in ultra-low symbol rate receivers and the word length is studied.Through analyzing the impact of word length selection to the system...The relationship between the hardware requirement of digital down converters（DDCs）in ultra-low symbol rate receivers and the word length is studied.Through analyzing the impact of word length selection to the system performance,a modified scheme is presented to decline the resource consumption without too much degradation on the signal to noise ratio（SNR）.Theoretical analysis and numerical results demonstrate that compared to the traditional design,the proposed scheme could save dozens of memory resources.The scheme also includes some selectable parameters to achieve desired performance in various circumstances.Different from previous work in DDCs that concentrates mostly on the structure design,this paper considers special applications such as ultra-low symbol rate receivers.展开更多
基金Supported by the National Natural Science Foundation of China(60972018)
文摘The relationship between the hardware requirement of digital down converters（DDCs）in ultra-low symbol rate receivers and the word length is studied.Through analyzing the impact of word length selection to the system performance,a modified scheme is presented to decline the resource consumption without too much degradation on the signal to noise ratio（SNR）.Theoretical analysis and numerical results demonstrate that compared to the traditional design,the proposed scheme could save dozens of memory resources.The scheme also includes some selectable parameters to achieve desired performance in various circumstances.Different from previous work in DDCs that concentrates mostly on the structure design,this paper considers special applications such as ultra-low symbol rate receivers.
