This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can ...This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.展开更多
Modeling and simulation results of a pulse skipping modulated buck converter for applications involving a source with widely varying voltage conditions with loads requiring constant voltage from full load down to no l...Modeling and simulation results of a pulse skipping modulated buck converter for applications involving a source with widely varying voltage conditions with loads requiring constant voltage from full load down to no load is presented. The pulses applied to the switch are blocked or released on output voltage crossing a predetermined value. The regulator worked satisfactorily over a wide input voltage range with good transient response but with higher ripple content. Input current spectrum indicates a good EMI performance with crowding of components at audio frequency range for the se-lected switching frequency.展开更多
A novel buck/LDO dual-mode （BLDM） converter using a multiplexing power MOS transistor is proposed, which adaptively switches between buck mode and LDO mode to improve conversion efficiency. The chip was fabricated i...A novel buck/LDO dual-mode （BLDM） converter using a multiplexing power MOS transistor is proposed, which adaptively switches between buck mode and LDO mode to improve conversion efficiency. The chip was fabricated in a standard 0.35 #m CMOS process. Measurement results show that the peak efficiency is 97%. For the light load operation, the efficiency is improved by 14%. The efficiency keeps higher than 82.5% for the load current of 50 mA without any complex control or extra EMI due to the normal method of pulse frequency modulation （PFM） control used for improving the light load efficiency. It does not cost much extra chip area because no additional regulator PMOS is needed. It is more suitable for noise-restricted systems and battery-powered electronic devices for when battery voltage drops because of long hours of work.展开更多
基金supported by the National Natural Science Foundation of China(No.61106026)the Fundamental Research Funds for the Central Universities of China(No.K50511020028)
文摘This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.
文摘Modeling and simulation results of a pulse skipping modulated buck converter for applications involving a source with widely varying voltage conditions with loads requiring constant voltage from full load down to no load is presented. The pulses applied to the switch are blocked or released on output voltage crossing a predetermined value. The regulator worked satisfactorily over a wide input voltage range with good transient response but with higher ripple content. Input current spectrum indicates a good EMI performance with crowding of components at audio frequency range for the se-lected switching frequency.
基金supported by the National Natural Science Foundation of China(Nos.60971049,61271089)
文摘A novel buck/LDO dual-mode （BLDM） converter using a multiplexing power MOS transistor is proposed, which adaptively switches between buck mode and LDO mode to improve conversion efficiency. The chip was fabricated in a standard 0.35 #m CMOS process. Measurement results show that the peak efficiency is 97%. For the light load operation, the efficiency is improved by 14%. The efficiency keeps higher than 82.5% for the load current of 50 mA without any complex control or extra EMI due to the normal method of pulse frequency modulation （PFM） control used for improving the light load efficiency. It does not cost much extra chip area because no additional regulator PMOS is needed. It is more suitable for noise-restricted systems and battery-powered electronic devices for when battery voltage drops because of long hours of work.
