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一种宽电压输入范围降压稳压电路的设计 被引量:9

Design of Step-Down Regulator Circuit with Wide Input Voltage
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摘要 为了解决高压恒流源芯片内部低压模块供电问题,通过集成降压预调整电路、前置基准源和线性稳压器3个模块,设计了一种宽电压输入范围的降压稳压电路。采用0.6μm BCD工艺模型进行仿真验证。结果显示,降压预调整电路低压跟随时压差在50 mV内。输入在6~40 V范围内变化时,偏置和基准的变化分别为1.13 mV和0.3 mV幅度。线性稳压器直流下PSRR可达-85 dB,在1 MHz工作频率下,输入电压为6 V和40 V时,模拟电源变化幅度分别不超过24 mV和46 mV,数字电源变化幅度分别不超过0.3 V和0.8 V。该降压稳压电路已成功应用于高压LED恒流源中。 A buck regulator circuit with wide voltage input range was designed,into which buck pre-regulator circuit,pre-reference source and a linear regulator were integrated,to provide power supply for built-in low-voltage module in high-voltage current source IC.Based on 0.6 μm BCD model,the circuit was simulated for verification.Results showed that voltage drop of the buck pre-regulator circuit was less than 50 mV when low-voltage followed,and biasing and reference voltages only changed by 1.13 mV and 0.3 mV,respectively,for an input range from 6 V to 40 V.The linear regulator had a PSRR of-85 dB at low frequency.The analog power output changed by less than 24 mV and 46 mV,respectively,for 6 V and 40 V input at 1 MHz operating frequency,while the digital power output changed by less than 0.3 V and 0.8 V,respectively.The step-down regulator was successfully used in a high-voltage LED constant current source.
出处 《微电子学》 CAS CSCD 北大核心 2011年第1期53-56,共4页 Microelectronics
基金 国家教育部博士点基金资助项目(200806141100) 广东省自然科学基金资助项目(8452840301001693)
关键词 降压稳压电路 降压预调整 线性稳压器 BCD工艺 Step-down regulator Buck pre-regulator Linear regulator BCD process
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  • 1VAN DER BROECK H, SAUERLANDER G, WENDT M, et al.Power driver topologies and control schemes for LEDs [C]//IEEE Applied Power Elec Conf. Anaheim, CA, USA. 2007: 1319-1325. 被引量:1
  • 2陈永谦,冯全源.高压电源管理中内部稳压器的设计[J].微电子学,2009,39(2):211-214. 被引量:4
  • 3HUANG J H, LIU Z H, JENG M C, et al. A robust physical and predictive model for deep-submicrometer MOS circuit simulation [C] // IEEE Custom Integr Circ Conf. San Diego, CA, USA. 1993: 14. 2. 1-14. 2.4. 被引量:1
  • 4GRAY P R, HURST P J, LEWIS S H, et al. Analysis and design of analog integrated circuits [M]. 4th Ed. New York: John Wiley & Sons, Inc. 2001: 303- 304. 被引量:1
  • 5GUPTA V, RINCON-MORA G A, RAHA P. Analy sis and design of monolithic, high PSRR linear regula tors for SoC applications [C] // IEEE Int SoC Conf. Santa Clara, CA, USA. 2004: 311-315. 被引量:1

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