DQPSK modem has been chosen as the modem scheme in many mobile communication systems. A new signal processing technique of π/4-DQPSK modem based on software radio is discussed in this paper. Unlike many other softwar...DQPSK modem has been chosen as the modem scheme in many mobile communication systems. A new signal processing technique of π/4-DQPSK modem based on software radio is discussed in this paper. Unlike many other software radio solutions to the subject, we choose a universal digital radio baseband processor operating as the co-processor of DSP. Only the core algorithms for signal processing are implemented with DSP. Thus the computation burden on DSP is reduced significantly. Compared with the traditional ones, the technique mentioned in this paper is more promising and attractive. It is extremely compact and power-efficient, which is often required by a mobile communication system. The implementation of baseband signal processing for π/4-DQPSK modem on this platform is illustrated in detail. Special emphases are laid on the architecture of the system and the algorithms used in the baseband signal processing. Finally, some experimental results are presented and the performances of the signal processing and compensation algorithms are evaluated through computer simulations.展开更多
This paper presents a novel topology to control the baseband impedance of a power amplifier(PA)to avoid performance deterioration in concurrent dual-band mode.This topology can avoid pure resonance of capacitors and i...This paper presents a novel topology to control the baseband impedance of a power amplifier(PA)to avoid performance deterioration in concurrent dual-band mode.This topology can avoid pure resonance of capacitors and inductors LC,which leads to a high impedance at some frequency points.Consequently,it can be applied to transmitters that are excited by broadband signals.In particular,by adjusting the circuit parameters and increasing stages,the impedance of the key frequency bands can be flexibly controlled.A PA is designed to support this design idea.Its saturated output power is around 46.7 dBm,and the drain efficiency is>68.2%(1.8-2.3 GHz).Under concurrent two-tone excitation,the drain efficiency reaches around 40%even under 5.5 dB back-off power with the tone spacing from 10 MHz to 500 MHz.These results demonstrate that the proposed topology is capable of controlling wideband baseband impedance.展开更多
This paper presents the design and implementation of a low power wide tuning range baseband filter with an accurate on-chip tuning circuit for reconfigurable multistandard wireless transceivers. The realized low pass ...This paper presents the design and implementation of a low power wide tuning range baseband filter with an accurate on-chip tuning circuit for reconfigurable multistandard wireless transceivers. The realized low pass filter （LPF） is a six-order Butterworth type by cascading three stage active-Gm-RC biquadratic cells. A mod- ified linearization technique is used to improve the filter linearity performance at low power consumption. A new process-independent transconductor matching circuit and a new frequency tuning circuit with frequency compen- sation are proposed to achieve a high precision filter frequency response. The proposed LPF is realized in a 130 nm standard CMOS technology. The measured results show that the LPF exhibits a high bandwidth programmability from 0.1 to 25 MHz with a tuning frequency error less than 2.68% over the wide tuning range. The power consump- tion is scalable, ranging from 0.52 to 5.25 mA, from a 1.2 V power supply while achieving a 26.3 dBm in-band IIP3.展开更多
This paper aims to discuss how to effectively suppress intersymbol interference by optimizing the filter design, so as to achieve a distortion-free output effect, and effectively compensate the transmission characteri...This paper aims to discuss how to effectively suppress intersymbol interference by optimizing the filter design, so as to achieve a distortion-free output effect, and effectively compensate the transmission characteristics of the baseband transmission system in a non-ideal channel environment, so as to minimize the impact of intersymbol crosser. The simulation experiment model of digital optimal baseband transmission and the overall structure of the system are designed based on the Matlab simulation platform, and the parameters of each module in the simulation experiment model are set. The working process and performance of the digital optimal baseband transmission system are simulated, and the conditions and performance of the digital optimal baseband transmission system are verified according to the simulation results.展开更多
This paper presents a continuously and widely tunable analog baseband chain with a digital-assisted calibration scheme implemented on a 0.13μm CMOS technology.The analog baseband is compliant with several digital bro...This paper presents a continuously and widely tunable analog baseband chain with a digital-assisted calibration scheme implemented on a 0.13μm CMOS technology.The analog baseband is compliant with several digital broadcasting system（DBS） standards,including DVB-S,DVB-S2,and ABS-S.The cut-off frequency of the baseband circuit can be changed continuously from 4.5 to 32 MHz.The gain adjustment range is from 6 to 55.5 dB with 0.5 dB step.The calibration includes automatic frequency tuning（AFT） and automatic DC offset calibration （DCOC） to achieve less than 6%cut-off frequency deviation and 3 mV residual output offset.The out-of-band IIP2 and IIP3 of the overall chain are 45 dBm and 18 dBm respectively,while the input referred noise（IRN） is 17.4 nV/√Hz.All circuit blocks are operated at 2.8 V from LDO and consume current of 20.4 mA in the receiving mode.展开更多
Baseband design and implementation for micro/pico base stations （mBS） in 5G ultra-dense network （UDN） is studied. Low cost is an essential requirement for mBS baseband in UDN. Digital baseband cost of ASIC/ASIP （...Baseband design and implementation for micro/pico base stations （mBS） in 5G ultra-dense network （UDN） is studied. Low cost is an essential requirement for mBS baseband in UDN. Digital baseband cost of ASIC/ASIP （Application Specific Integrated Circuit / Instruction-set processor） is of the most uncertainty in roBS system. However. the actual costs and hardware feasibility of the baseband are yet unknown to network deployers and researchers. In this paper, we studied the baseband hardware system design and implementation for low-cost roBS. We analyzed popular baseband algorithms and architectures for both full-digital and hybrid beamforming （BF） for UDN. We then proposed feasible chip-level solutions for the baseband with up to 128-antenna BS system, and estimated their implementation cost. Results show that among lull-digital BF algorithms, zero-forcing is a choice of high performance and low cost; for hybrid BF, 4×32 architecture （32 RF chains） provides good reduction in baseband cost with acceptable performance loss, thus it can be a preferable solution under low cost consider- ation. The proposed system planning method can also be used for the design of other related systems.展开更多
文摘DQPSK modem has been chosen as the modem scheme in many mobile communication systems. A new signal processing technique of π/4-DQPSK modem based on software radio is discussed in this paper. Unlike many other software radio solutions to the subject, we choose a universal digital radio baseband processor operating as the co-processor of DSP. Only the core algorithms for signal processing are implemented with DSP. Thus the computation burden on DSP is reduced significantly. Compared with the traditional ones, the technique mentioned in this paper is more promising and attractive. It is extremely compact and power-efficient, which is often required by a mobile communication system. The implementation of baseband signal processing for π/4-DQPSK modem on this platform is illustrated in detail. Special emphases are laid on the architecture of the system and the algorithms used in the baseband signal processing. Finally, some experimental results are presented and the performances of the signal processing and compensation algorithms are evaluated through computer simulations.
基金Project supported by the National Natural Science Foundation of China(No.62001061)the Science and Technology Research Program of Chongqing Municipal Education Commission,China(No.KJQN202201525)+1 种基金the Natural Science Foundation of Chongqing,China(No.CSTB2022NSCQ-MSX0453)the Research Foundation of Chongqing University of Science and Technology,China(No.CKRC2020029)。
文摘This paper presents a novel topology to control the baseband impedance of a power amplifier(PA)to avoid performance deterioration in concurrent dual-band mode.This topology can avoid pure resonance of capacitors and inductors LC,which leads to a high impedance at some frequency points.Consequently,it can be applied to transmitters that are excited by broadband signals.In particular,by adjusting the circuit parameters and increasing stages,the impedance of the key frequency bands can be flexibly controlled.A PA is designed to support this design idea.Its saturated output power is around 46.7 dBm,and the drain efficiency is>68.2%(1.8-2.3 GHz).Under concurrent two-tone excitation,the drain efficiency reaches around 40%even under 5.5 dB back-off power with the tone spacing from 10 MHz to 500 MHz.These results demonstrate that the proposed topology is capable of controlling wideband baseband impedance.
基金supported by the Scientific Research Plan Projects of Hebei Education Department(No.Q2012019)
文摘This paper presents the design and implementation of a low power wide tuning range baseband filter with an accurate on-chip tuning circuit for reconfigurable multistandard wireless transceivers. The realized low pass filter （LPF） is a six-order Butterworth type by cascading three stage active-Gm-RC biquadratic cells. A mod- ified linearization technique is used to improve the filter linearity performance at low power consumption. A new process-independent transconductor matching circuit and a new frequency tuning circuit with frequency compen- sation are proposed to achieve a high precision filter frequency response. The proposed LPF is realized in a 130 nm standard CMOS technology. The measured results show that the LPF exhibits a high bandwidth programmability from 0.1 to 25 MHz with a tuning frequency error less than 2.68% over the wide tuning range. The power consump- tion is scalable, ranging from 0.52 to 5.25 mA, from a 1.2 V power supply while achieving a 26.3 dBm in-band IIP3.
文摘This paper aims to discuss how to effectively suppress intersymbol interference by optimizing the filter design, so as to achieve a distortion-free output effect, and effectively compensate the transmission characteristics of the baseband transmission system in a non-ideal channel environment, so as to minimize the impact of intersymbol crosser. The simulation experiment model of digital optimal baseband transmission and the overall structure of the system are designed based on the Matlab simulation platform, and the parameters of each module in the simulation experiment model are set. The working process and performance of the digital optimal baseband transmission system are simulated, and the conditions and performance of the digital optimal baseband transmission system are verified according to the simulation results.
基金supported by the National Natural Science Foundation of China(Nos.61176093,51072171)
文摘This paper presents a continuously and widely tunable analog baseband chain with a digital-assisted calibration scheme implemented on a 0.13μm CMOS technology.The analog baseband is compliant with several digital broadcasting system（DBS） standards,including DVB-S,DVB-S2,and ABS-S.The cut-off frequency of the baseband circuit can be changed continuously from 4.5 to 32 MHz.The gain adjustment range is from 6 to 55.5 dB with 0.5 dB step.The calibration includes automatic frequency tuning（AFT） and automatic DC offset calibration （DCOC） to achieve less than 6%cut-off frequency deviation and 3 mV residual output offset.The out-of-band IIP2 and IIP3 of the overall chain are 45 dBm and 18 dBm respectively,while the input referred noise（IRN） is 17.4 nV/√Hz.All circuit blocks are operated at 2.8 V from LDO and consume current of 20.4 mA in the receiving mode.
基金supporting from National High Technical Research and Development Program of China(863 program)2014AA01A705 is sincerely acknowledged by authors
文摘Baseband design and implementation for micro/pico base stations （mBS） in 5G ultra-dense network （UDN） is studied. Low cost is an essential requirement for mBS baseband in UDN. Digital baseband cost of ASIC/ASIP （Application Specific Integrated Circuit / Instruction-set processor） is of the most uncertainty in roBS system. However. the actual costs and hardware feasibility of the baseband are yet unknown to network deployers and researchers. In this paper, we studied the baseband hardware system design and implementation for low-cost roBS. We analyzed popular baseband algorithms and architectures for both full-digital and hybrid beamforming （BF） for UDN. We then proposed feasible chip-level solutions for the baseband with up to 128-antenna BS system, and estimated their implementation cost. Results show that among lull-digital BF algorithms, zero-forcing is a choice of high performance and low cost; for hybrid BF, 4×32 architecture （32 RF chains） provides good reduction in baseband cost with acceptable performance loss, thus it can be a preferable solution under low cost consider- ation. The proposed system planning method can also be used for the design of other related systems.
