铁电存储器(ferroelectric random access memory,FRAM)是利用铁电材料可以自发极化,并且极化强度可以随外电场的作用而重新取向的特性为存储机制的一种非易失性存储器,它以其功耗低、读写速度快、耐久度高、抗辐射能力强等优点,成为存...铁电存储器(ferroelectric random access memory,FRAM)是利用铁电材料可以自发极化,并且极化强度可以随外电场的作用而重新取向的特性为存储机制的一种非易失性存储器,它以其功耗低、读写速度快、耐久度高、抗辐射能力强等优点,成为存储器领域最具潜力的产品之一。首先设计了一种1 kbit铁电存储芯片的整体架构,其次对其不同的工作时序进行了分析,再次对铁电存储器外围译码电路、驱动电路以及灵敏放大电路等电路模块进行了设计,每个设计过程包括电路设计、电路仿真和版图设计。由仿真结果可以看出,电路的选取均适用于铁电存储器的要求,为以后大容量、产品化的铁电存储器设计起到了基础性的指导作用。展开更多
This paper presents a transmitter IC with BPSK modulation for an ultra-wide band system.It is based on up-conversion with a high linearity passive mixer.Unlike the traditional BPSK modulation scheme,the local oscillat...This paper presents a transmitter IC with BPSK modulation for an ultra-wide band system.It is based on up-conversion with a high linearity passive mixer.Unlike the traditional BPSK modulation scheme,the local oscillator （LO） is modulated by the baseband data instead of the pulse.The chip is designed and fabricated by standard 0.18μm CMOS technology.The transmitter achieves a high data rate up to 400 Mbps.The amplitude of the pulse can be adjusted by the amplitude of the LO and the bias current of the driver amplifier.The maximum peak-to-peak amplitude of the pulse is 600 mV.It consumes only 20.3 mA current with a supply voltage of 1.8 V when transmitting a pulse at the maximum data rate.The energy efficiency is 91.4 pJ/pulse.The die area is 1.4×1.4 mm^2.展开更多
文摘基于0.25μm GaAs PHEMT工艺设计了一款7~13 GHz微波单片高效率驱动放大器。芯片采用两级级联拓扑结构,在输入级引入共源并联负反馈结构拓宽工作带宽,同时为兼顾输出功率和效率,在输出级引入等效RC模型拟合输出管芯的最优阻抗。基于等效RC模型,通过采用电抗匹配方式降低输出宽带匹配网络的损耗来实现较高的输出功率和附加效率。实测与仿真曲线吻合度较好,实测结果显示:在7~13 GHz工作带宽范围内,输入驻波比小于1.5,输出驻波比小于1.8,线性增益大于13 d B,3 d B压缩点输出功率大于24 d Bm,功率附加效率大于35%,芯片面积为1.8 mm×0.8 mm。
文摘铁电存储器(ferroelectric random access memory,FRAM)是利用铁电材料可以自发极化,并且极化强度可以随外电场的作用而重新取向的特性为存储机制的一种非易失性存储器,它以其功耗低、读写速度快、耐久度高、抗辐射能力强等优点,成为存储器领域最具潜力的产品之一。首先设计了一种1 kbit铁电存储芯片的整体架构,其次对其不同的工作时序进行了分析,再次对铁电存储器外围译码电路、驱动电路以及灵敏放大电路等电路模块进行了设计,每个设计过程包括电路设计、电路仿真和版图设计。由仿真结果可以看出,电路的选取均适用于铁电存储器的要求,为以后大容量、产品化的铁电存储器设计起到了基础性的指导作用。
基金supported by the National High Technology Research and Development Program of China(No.2007AA01Z2b2)
文摘This paper presents a transmitter IC with BPSK modulation for an ultra-wide band system.It is based on up-conversion with a high linearity passive mixer.Unlike the traditional BPSK modulation scheme,the local oscillator （LO） is modulated by the baseband data instead of the pulse.The chip is designed and fabricated by standard 0.18μm CMOS technology.The transmitter achieves a high data rate up to 400 Mbps.The amplitude of the pulse can be adjusted by the amplitude of the LO and the bias current of the driver amplifier.The maximum peak-to-peak amplitude of the pulse is 600 mV.It consumes only 20.3 mA current with a supply voltage of 1.8 V when transmitting a pulse at the maximum data rate.The energy efficiency is 91.4 pJ/pulse.The die area is 1.4×1.4 mm^2.
