A newΣΔmodulator architecture for thermal vacuum sensor ASICs is proposed.The micro-hotplate thermal vacuum sensor fabricated by surface-micrornachining technology can detect the gas pressure from 1 to 10;Pa. The am...A newΣΔmodulator architecture for thermal vacuum sensor ASICs is proposed.The micro-hotplate thermal vacuum sensor fabricated by surface-micrornachining technology can detect the gas pressure from 1 to 10;Pa. The amplified differential output voltage signal of the sensor feeds to theΣΔmodulator to be converted into digital domain.The presentedΣΔmodulator makes use of a feed-forward path to suppress the harmonic distortions and attain high linearity.Compared with other feed-forward architectures presented before,the circuit complexity,chip area and power dissipation of the proposed architecture are significantly decreased.The correlated double sampling technique is introduced in the 1st integrator to reduce the flicker noise.The measurement results demonstrate that the modulator achieves an SNDR of 79.7 dB and a DR of 80 dB over a bandwidth of 7.8 kHz at a sampling rate of 4 MHz.The circuit has been fabricated in a 0.5μm 2P3M standard CMOS technology.It occupies an area of 5 mm;and dissipates 9 mW from a single 3 V power supply.The performance of the modulator meets the requirements of the considered application.展开更多
A high-performance low-powerΣΔanalog-to-digital converter（ADC） for digital audio applications is described.It consists of a 2-1 cascadedΣΔmodulator and a decimation filter.Various design optimizations are implem...A high-performance low-powerΣΔanalog-to-digital converter（ADC） for digital audio applications is described.It consists of a 2-1 cascadedΣΔmodulator and a decimation filter.Various design optimizations are implemented in the system design,circuit implementation and layout design,including a high-overload-level coefficient-optimized modulator architecture,a power-efficient class A/AB operational transconductance amplifier,as well as a multi-stage decimation filter conserving area and power consumption.The ADC is implemented in the SMIC 0.18-μm CMOS mixed-signal process.The experimental chip achieves a peak signal-to-noise-plus-distortion ratio of 90 dB and a dynamic range of 94 dB over 22.05-kHz audio band and occupies 2.1 mm^2,which dissipates only 2.1 mA quiescent current in the analog circuits.展开更多
It is usually difficult to design a high performance Sigma⁃Delta(ΣΔ)modulator due to system noises.In this paper,a disturbance observer(DOB)is utilized to estimate the system noises and eliminate their effects on Σ...It is usually difficult to design a high performance Sigma⁃Delta(ΣΔ)modulator due to system noises.In this paper,a disturbance observer(DOB)is utilized to estimate the system noises and eliminate their effects on ΣΔ modulators.The applied DOB is introduced with a Bode's ideal cut⁃off(BICO)filter used for the Q⁃filter.The proposed DOB with the BICO filter used in ΣΔ modulators can achieve better noise⁃shaping ability,resulting from the less phase loss of the BICO filter.Finally,the simulation results show that the proposed BICO filter scheme is a useful additional tool for improving the performance of ΣΔ modulators.展开更多
基金Project supported by the National Natural Science Foundation of China(No.90607003).
文摘A newΣΔmodulator architecture for thermal vacuum sensor ASICs is proposed.The micro-hotplate thermal vacuum sensor fabricated by surface-micrornachining technology can detect the gas pressure from 1 to 10;Pa. The amplified differential output voltage signal of the sensor feeds to theΣΔmodulator to be converted into digital domain.The presentedΣΔmodulator makes use of a feed-forward path to suppress the harmonic distortions and attain high linearity.Compared with other feed-forward architectures presented before,the circuit complexity,chip area and power dissipation of the proposed architecture are significantly decreased.The correlated double sampling technique is introduced in the 1st integrator to reduce the flicker noise.The measurement results demonstrate that the modulator achieves an SNDR of 79.7 dB and a DR of 80 dB over a bandwidth of 7.8 kHz at a sampling rate of 4 MHz.The circuit has been fabricated in a 0.5μm 2P3M standard CMOS technology.It occupies an area of 5 mm;and dissipates 9 mW from a single 3 V power supply.The performance of the modulator meets the requirements of the considered application.
文摘A high-performance low-powerΣΔanalog-to-digital converter（ADC） for digital audio applications is described.It consists of a 2-1 cascadedΣΔmodulator and a decimation filter.Various design optimizations are implemented in the system design,circuit implementation and layout design,including a high-overload-level coefficient-optimized modulator architecture,a power-efficient class A/AB operational transconductance amplifier,as well as a multi-stage decimation filter conserving area and power consumption.The ADC is implemented in the SMIC 0.18-μm CMOS mixed-signal process.The experimental chip achieves a peak signal-to-noise-plus-distortion ratio of 90 dB and a dynamic range of 94 dB over 22.05-kHz audio band and occupies 2.1 mm^2,which dissipates only 2.1 mA quiescent current in the analog circuits.
基金Sponsored by the Top Scientific and Technological Innovation Team from Beijing University of Chemical Technology(Grant No.BUCTYLKJCX06)
文摘It is usually difficult to design a high performance Sigma⁃Delta(ΣΔ)modulator due to system noises.In this paper,a disturbance observer(DOB)is utilized to estimate the system noises and eliminate their effects on ΣΔ modulators.The applied DOB is introduced with a Bode's ideal cut⁃off(BICO)filter used for the Q⁃filter.The proposed DOB with the BICO filter used in ΣΔ modulators can achieve better noise⁃shaping ability,resulting from the less phase loss of the BICO filter.Finally,the simulation results show that the proposed BICO filter scheme is a useful additional tool for improving the performance of ΣΔ modulators.
