Single event effects of 1-T structure programmable read-only memory(PROM) devices fabricated with a 130-nm complementary metal oxide semiconductorbased thin/thick gate oxide anti-fuse process were investigated using h...Single event effects of 1-T structure programmable read-only memory(PROM) devices fabricated with a 130-nm complementary metal oxide semiconductorbased thin/thick gate oxide anti-fuse process were investigated using heavy ions and a picosecond pulsed laser. The cross sections of a single event upset(SEU) for radiationhardened PROMs were measured using a linear energy transfer(LET) ranging from 9.2 to 95.6 MeV cm^2mg^(-1).The result indicated that the LET threshold for a dynamic bit upset was ~ 9 MeV cm^2mg^(-1), which was lower than the threshold of ~ 20 MeV cm^2mg^(-1) for an address counter upset owing to the additional triple modular redundancy structure present in the latch. In addition, a slight hard error was observed in the anti-fuse structure when employing209 Bi ions with extremely high LET values(~ 91.6 MeV cm^2mg^(-1)) and large ion fluence(~ 1×10~8 ions cm^(-2)). To identify the detailed sensitive position of a SEU in PROMs, a pulsed laser with a 5-μm beam spot was used to scan the entire surface of the device.This revealed that the upset occurred in the peripheral circuits of the internal power source and I/O pairs rather than in the internal latches and buffers. This was subsequently confirmed by a ^(181)Ta experiment. Based on the experimental data and a rectangular parallelepiped model of the sensitive volume, the space error rates for the used PROMs were calculated using the CRèME-96 prediction tool. The results showed that this type of PROM was suitable for specific space applications, even in the geosynchronous orbit.展开更多
The 28 nm process has a high cost-performance ratio and has gradually become the standard for the field of radiation-hardened devices.However,owing to the minimum physical gate length of only 35 nm,the physical area o...The 28 nm process has a high cost-performance ratio and has gradually become the standard for the field of radiation-hardened devices.However,owing to the minimum physical gate length of only 35 nm,the physical area of a standard 6T SRAM unit is approximately 0.16μm^(2),resulting in a significant enhancement of multi-cell charge-sharing effects.Multiple-cell upsets(MCUs)have become the primary physical mechanism behind single-event upsets(SEUs)in advanced nanometer node devices.The range of ionization track effects increases with higher ion energies,and spacecraft in orbit primarily experience SEUs caused by high-energy ions.However,ground accelerator experiments have mainly obtained low-energy ion irradiation data.Therefore,the impact of ion energy on the SEU cross section,charge collection mechanisms,and MCU patterns and quantities in advanced nanometer devices remains unclear.In this study,based on the experimental platform of the Heavy Ion Research Facility in Lanzhou,low-and high-energy heavy-ion beams were used to study the SEUs of 28 nm SRAM devices.The influence of ion energy on the charge collection processes of small-sensitive-volume devices,MCU patterns,and upset cross sections was obtained,and the applicable range of the inverse cosine law was clarified.The findings of this study are an important guide for the accurate evaluation of SEUs in advanced nanometer devices and for the development of radiation-hardening techniques.展开更多
Three-dimensional(3 D)TCAD simulations demonstrate that reducing the distance between the well boundary and N-channel metal-oxide semiconductor(NMOS)transistor or P-channel metal-oxide semiconductor(PMOS)transistor ca...Three-dimensional(3 D)TCAD simulations demonstrate that reducing the distance between the well boundary and N-channel metal-oxide semiconductor(NMOS)transistor or P-channel metal-oxide semiconductor(PMOS)transistor can mitigate the cross section of single event upset(SEU)in 14-nm complementary metal-oxide semiconductor(CMOS)bulk Fin FET technology.The competition of charge collection between well boundary and sensitive nodes,the enhanced restoring currents and the change of bipolar effect are responsible for the decrease of SEU cross section.Unlike dualinterlock cell(DICE)design,this approach is more effective under heavy ion irradiation of higher LET,in the presence of enough taps to ensure the rapid recovery of well potential.Besides,the feasibility of this method and its effectiveness with feature size scaling down are discussed.展开更多
Geant4 Monte Carlo simulation results of the single event upset(SEU)induced by protons with energy ranging from 0.3 MeV to 1 GeV are reported.The SEU cross section for planar and three-dimensional(3D)die-stacked SRAM ...Geant4 Monte Carlo simulation results of the single event upset(SEU)induced by protons with energy ranging from 0.3 MeV to 1 GeV are reported.The SEU cross section for planar and three-dimensional(3D)die-stacked SRAM are calculated.The results show that the SEU cross sections of the planar device and the 3D device are different from each other under low energy proton direct ionization mechanism,but almost the same for the high energy proton.Besides,the multi-bit upset(MBU)ratio and pattern are presented and analyzed.The results indicate that the MBU ratio of the 3D die-stacked device is higher than that of the planar device,and the MBU patterns are more complicated.Finally,the on-orbit upset rate for the 3D die-stacked device and the planar device are calculated by SPACE RADIATION software.The calculation results indicate that no matter what the orbital parameters and shielding conditions are,the on-orbit upset rate of planar device is higher than that of 3D die-stacked device.展开更多
The influences of total ionizing dose (TID) on the single event effect (SEE) sensitivity of 34-nm and 25-nm NAND flash memories are investigated in this paper. The increase in the cross section of heavy-ion single...The influences of total ionizing dose (TID) on the single event effect (SEE) sensitivity of 34-nm and 25-nm NAND flash memories are investigated in this paper. The increase in the cross section of heavy-ion single event upset (SEU) in memories that have ever been exposed to TID is observed, which is attributed to the combination of the threshold voltage shifts induced by 7-rays and heavy ions. Retention errors in floating gate (FG) cells after heavy ion irradiation are observed. Moreover, the cross section of retention error increases if the memory has ever been exposed to TID. This effect is more evident at a low linear energy transfer (LET) value. The underlying mechanism is identified as the combination of the defects induced by 7-rays and heavy ions, which increases the possibility to constitute a multi-trap assisted tunneling (m- TAT) path across the tunnel oxide.展开更多
Three-dimensional integrated circuits(3D ICs)have entered into the mainstream due to their high performance,high integration,and low power consumption.When used in atmospheric environments,3D ICs are irradiated inevit...Three-dimensional integrated circuits(3D ICs)have entered into the mainstream due to their high performance,high integration,and low power consumption.When used in atmospheric environments,3D ICs are irradiated inevitably by neutrons.In this paper,a 3D die-stacked SRAM device is constructed based on a real planar SRAM device.Then,the single event upsets(SEUs)caused by neutrons with different energies are studied by the Monte Carlo method.The SEU cross-sections for each die and for the whole three-layer die-stacked SRAM device is obtained for neutrons with energy ranging from 1 MeV to 1000 MeV.The results indicate that the variation trend of the SEU cross-section for every single die and for the entire die-stacked device is consistent,but the specific values are different.The SEU cross-section is shown to be dependent on the threshold of linear energy transfer(LETth)and thickness of the sensitive volume(Tsv).The secondary particle distribution and energy deposition are analyzed,and the internal mechanism that is responsible for this difference is illustrated.Besides,the ratio and patterns of multiple bit upset(MBU)caused by neutrons with different energies are also presented.This work is helpful for the aerospace IC designers to understand the SEU mechanism of 3D ICs caused by neutrons irradiation.展开更多
基金supported by the National Natural Science Foundation of China(Nos.11690041,11805244,and 11675233)the Opening Project of Science and Technology on Reliability Physics and Application Technology of the Electronic Component Laboratory(No.ZHD 201604)
文摘Single event effects of 1-T structure programmable read-only memory(PROM) devices fabricated with a 130-nm complementary metal oxide semiconductorbased thin/thick gate oxide anti-fuse process were investigated using heavy ions and a picosecond pulsed laser. The cross sections of a single event upset(SEU) for radiationhardened PROMs were measured using a linear energy transfer(LET) ranging from 9.2 to 95.6 MeV cm^2mg^(-1).The result indicated that the LET threshold for a dynamic bit upset was ~ 9 MeV cm^2mg^(-1), which was lower than the threshold of ~ 20 MeV cm^2mg^(-1) for an address counter upset owing to the additional triple modular redundancy structure present in the latch. In addition, a slight hard error was observed in the anti-fuse structure when employing209 Bi ions with extremely high LET values(~ 91.6 MeV cm^2mg^(-1)) and large ion fluence(~ 1×10~8 ions cm^(-2)). To identify the detailed sensitive position of a SEU in PROMs, a pulsed laser with a 5-μm beam spot was used to scan the entire surface of the device.This revealed that the upset occurred in the peripheral circuits of the internal power source and I/O pairs rather than in the internal latches and buffers. This was subsequently confirmed by a ^(181)Ta experiment. Based on the experimental data and a rectangular parallelepiped model of the sensitive volume, the space error rates for the used PROMs were calculated using the CRèME-96 prediction tool. The results showed that this type of PROM was suitable for specific space applications, even in the geosynchronous orbit.
基金supported by the National Natural Science Foundation of China(Nos.12105341 and 12035019)the opening fund of Key Laboratory of Silicon Device and Technology,Chinese Academy of Sciences(No.KLSDTJJ2022-3).
文摘The 28 nm process has a high cost-performance ratio and has gradually become the standard for the field of radiation-hardened devices.However,owing to the minimum physical gate length of only 35 nm,the physical area of a standard 6T SRAM unit is approximately 0.16μm^(2),resulting in a significant enhancement of multi-cell charge-sharing effects.Multiple-cell upsets(MCUs)have become the primary physical mechanism behind single-event upsets(SEUs)in advanced nanometer node devices.The range of ionization track effects increases with higher ion energies,and spacecraft in orbit primarily experience SEUs caused by high-energy ions.However,ground accelerator experiments have mainly obtained low-energy ion irradiation data.Therefore,the impact of ion energy on the SEU cross section,charge collection mechanisms,and MCU patterns and quantities in advanced nanometer devices remains unclear.In this study,based on the experimental platform of the Heavy Ion Research Facility in Lanzhou,low-and high-energy heavy-ion beams were used to study the SEUs of 28 nm SRAM devices.The influence of ion energy on the charge collection processes of small-sensitive-volume devices,MCU patterns,and upset cross sections was obtained,and the applicable range of the inverse cosine law was clarified.The findings of this study are an important guide for the accurate evaluation of SEUs in advanced nanometer devices and for the development of radiation-hardening techniques.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.12035019,11690041,and 62004221)。
文摘Three-dimensional(3 D)TCAD simulations demonstrate that reducing the distance between the well boundary and N-channel metal-oxide semiconductor(NMOS)transistor or P-channel metal-oxide semiconductor(PMOS)transistor can mitigate the cross section of single event upset(SEU)in 14-nm complementary metal-oxide semiconductor(CMOS)bulk Fin FET technology.The competition of charge collection between well boundary and sensitive nodes,the enhanced restoring currents and the change of bipolar effect are responsible for the decrease of SEU cross section.Unlike dualinterlock cell(DICE)design,this approach is more effective under heavy ion irradiation of higher LET,in the presence of enough taps to ensure the rapid recovery of well potential.Besides,the feasibility of this method and its effectiveness with feature size scaling down are discussed.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.11690041 and 11675233)the Fund from the Science and Technology on Analog Integrated Circuit Laboratory,China(Grant No.JCKY2019210C054).
文摘Geant4 Monte Carlo simulation results of the single event upset(SEU)induced by protons with energy ranging from 0.3 MeV to 1 GeV are reported.The SEU cross section for planar and three-dimensional(3D)die-stacked SRAM are calculated.The results show that the SEU cross sections of the planar device and the 3D device are different from each other under low energy proton direct ionization mechanism,but almost the same for the high energy proton.Besides,the multi-bit upset(MBU)ratio and pattern are presented and analyzed.The results indicate that the MBU ratio of the 3D die-stacked device is higher than that of the planar device,and the MBU patterns are more complicated.Finally,the on-orbit upset rate for the 3D die-stacked device and the planar device are calculated by SPACE RADIATION software.The calculation results indicate that no matter what the orbital parameters and shielding conditions are,the on-orbit upset rate of planar device is higher than that of 3D die-stacked device.
基金Project supported by the National Basic Research Program of China(973 Program)(No.2012CB719806)the National Natural Science Foundation of China(Nos.51478427,51278452,51578356,51508508,and 51008274)+2 种基金the Fundamental Research Funds for the Central Universities(No.2014QNA4019)the Natural Science Foundation of Zhejiang Province(No.LY13D060003)Zhejiang Provincial Public Industry Research Project(No.2015C31005),China
基金Project supported by the National Natural Science Foundation of China(Grant Nos.11690041,11675233,U1532261,and 11505243)
文摘The influences of total ionizing dose (TID) on the single event effect (SEE) sensitivity of 34-nm and 25-nm NAND flash memories are investigated in this paper. The increase in the cross section of heavy-ion single event upset (SEU) in memories that have ever been exposed to TID is observed, which is attributed to the combination of the threshold voltage shifts induced by 7-rays and heavy ions. Retention errors in floating gate (FG) cells after heavy ion irradiation are observed. Moreover, the cross section of retention error increases if the memory has ever been exposed to TID. This effect is more evident at a low linear energy transfer (LET) value. The underlying mechanism is identified as the combination of the defects induced by 7-rays and heavy ions, which increases the possibility to constitute a multi-trap assisted tunneling (m- TAT) path across the tunnel oxide.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.12035019,111690041,and 11675233)the Project of Science and Technology on Analog Integrated Circuit Laboratory,China((Grant No.6142802WD201801).
文摘Three-dimensional integrated circuits(3D ICs)have entered into the mainstream due to their high performance,high integration,and low power consumption.When used in atmospheric environments,3D ICs are irradiated inevitably by neutrons.In this paper,a 3D die-stacked SRAM device is constructed based on a real planar SRAM device.Then,the single event upsets(SEUs)caused by neutrons with different energies are studied by the Monte Carlo method.The SEU cross-sections for each die and for the whole three-layer die-stacked SRAM device is obtained for neutrons with energy ranging from 1 MeV to 1000 MeV.The results indicate that the variation trend of the SEU cross-section for every single die and for the entire die-stacked device is consistent,but the specific values are different.The SEU cross-section is shown to be dependent on the threshold of linear energy transfer(LETth)and thickness of the sensitive volume(Tsv).The secondary particle distribution and energy deposition are analyzed,and the internal mechanism that is responsible for this difference is illustrated.Besides,the ratio and patterns of multiple bit upset(MBU)caused by neutrons with different energies are also presented.This work is helpful for the aerospace IC designers to understand the SEU mechanism of 3D ICs caused by neutrons irradiation.