摘要
近年来,功耗问题已成为VLSI设计,尤其是在电池供电的应用中必须考虑的重要问题之一。文章通过对CMOS集成电路功耗起因的分析,对CMOS集成电路低功耗设计方法[1]和设计工具进行了深入的讨论。
In recent years, power consumption has become a major concern for designing VLSI systems, especially in battery-operated applications. Through the analysis of the source of CMOS IC power consumption, design methods for low-power CMOS IC's and a set of EDA tools are discussed in detail in this paper.
出处
《微电子学》
CAS
CSCD
北大核心
2004年第3期223-226,共4页
Microelectronics
