摘要
提出了一种基于65 nm CMOS工艺的5位可编程模拟延时电路。采用1.2 V的电源电压和0.01 V的步进控制电压来实现方波输入信号的延时控制。利用Cadence软件对该延时电路进行了性能分析。仿真结果表明,在典型低阈值工艺角下,该延时电路利用5位延时控制信号达到了0.34 ns/LSB的最高延时分辨率和41.47 ns的最长输出延时,实现了对1 kHz～1 MHz范围的数字方波信号的有效延时控制。该延时电路适用于低频数据采集、数据存储等系统。
A 5-bit programmable analog delay element was designed in a 65 nm CMOS process.Both the supply voltage of 1.2 V and the control step voltage of 0.01 V were employed to realize the delay control of the input square wave signal.The performance of the delay element was analyzed by the Cadence software tools.The simulation results showed that,under the typical low threshold process corners,the achieved maximum delay resolution was up to 0.34 ns/LSB,and the longest output delay was up to 41.47 ns by using the 5-bit delay control signal.The proposed delay element could be employed to effectively control the delay of the square wave signal in a bandwidth ranging from 1 kHz to 1 MHz.The proposed delay element could be applied in the circuits of low frequency data acquisition and data storage.
作者
黄志慧
刘博
张金灿
刘敏
孟庆端
HUANG Zhihui;LIU Bo;ZHANG Jincan;LIU Min;MENG Qingduan(Electrical Engineering College,Henan University of Science and Technology,Luoyang,Henan471023,P.R.China)
出处
《微电子学》
CAS
北大核心
2019年第2期225-229,236,共6页
Microelectronics
基金
国家自然科学基金资助项目(61704049
61804046)
河南省科技厅科技计划项目(172102210258
182102210295)
河南省高等学校重点科研项目(19A510012)
关键词
可编程延时控制
延时量化误差
低功耗
programmable delay control
delay quantization error
low power consumption
