摘要
以增强型β-Ga_(2)O_(3)VDMOS器件作为研究对象,利用TCAD选择不同的栅介质材料作为研究变量,观察不同器件的单粒子栅穿效应敏感性。高k介质材料Al_(2)O_(3)和HfO_(2)栅介质器件在源漏电压200 V、栅源电压-10 V的偏置条件下能有效抵御线性能量转移为98 MeV·cm^(2)/mg的重离子攻击,SiO_(2)栅介质器件则发生了单粒子栅穿效应(Single event gate rupture,SEGR)。采用HfO_(2)作为栅介质时源漏电流和栅源电流分别下降92%和94%,峰值电场从1.5×10^(7)V/cm下降至2×10^(5)V/cm,避免了SEGR的发生。SEGR发生的原因是沟道处累积了大量的空穴,栅介质中的临界电场超过临界值导致了击穿,而高k栅介质可以有效降低器件敏感区域的碰撞发生率,抑制器件内电子空穴对的进一步生成,降低空穴累积的概率。
The capability of enhancedβ-Ga_(2)O_(3) VDMOS devices against SEGR was investigated in this article,utilizing TCAD simulations to examine the impacts of various gate dielectric materials.Devices with high-k gate dielectrics(Al_(2)O_(3) and HfO_(2))demonstrate effective immunity against a heavy ion strike with a linear energy transfer of 98 MeV·cm2/mg under the bias conditions of a drain-source voltage of 200 V and a gate-source voltage of-10 V.In contrast,devices with SiO_(2) gate dielectrics experience single event gate rupture(SEGR).Remarkably,HfO_(2) exhibite a substantial decline in both drain-source current and gate-source current by 92%and 94%,respectively.HfO_(2) gate sample al-so reduce the peak electric field from 1.5×10^(7) V/cm to 2×10^(5) V/cm,effectively avoiding SEGR.We determine that SEGR arises from substantial hole accumulation in the channel,triggered by exceeding the critical threshold in the gate dielectric's electric field.High-k gate dielectrics decrease the impact generation rate in the device's sensitive regions,further suppress the continuous creation of electron-hole pairs and minimize the probability of hole accumulation.
作者
王韬
张黎莉
段鑫沛
殷亚楠
周昕杰
WANG Tao;ZHANG Lili;DUAN Xinpei;YIN Yanan;ZHOU Xinjie(The 58th Research Institute of China Electronics Technology Group Corporation,Wuxi,Jiangsu,214072,CHN)
出处
《固体电子学研究与进展》
CAS
2024年第1期6-12,共7页
Research & Progress of SSE
