摘要
为了查明同步串行EEPROM芯片93LC56B是否适配DSP芯片TMS320F2812的SPI接口,分析了93LC56B的关键接口时序特性,设计电路将TMS320F2812和93LC56B的SPI引脚连接在FPGA的I/O引脚上,通过ChipScope抓取两个芯片的SPI接口数据,确定了TMS320F2812的SPI接口适配93LC56B时需要的寄存器参数和读写子程序,并发现了单次读取时数据最高位无效的应用限制。
In order to find out if DSP chip TMS320F2812 can read-write EEPROM chip 93LC56B through SPI interface,this paper analyzes the key interface timing characteristics of 93LC56B,designs a circuit which connects the SPI pins of TMS320F2812 and 93LC56B to I/O pins of FPGA.By capturing interface data of the two chips with ChipScope,this paper confirms the register parameters of TMS320F2812 SPI interface adapted for 93LC56B and gives the read-write subprogram,with findings that the most significant bit of data is inefficacious in single-step reading.
作者
张文婷
谢伟
Zhang Wenting;Xie Wei(The 29th Research Institute of CETC,Chengdu 610000,China)
出处
《单片机与嵌入式系统应用》
2023年第8期59-63,共5页
Microcontrollers & Embedded Systems
