摘要
针对常规串口通信波特率检测效率低、软件移植性差,甚至占用中央处理器(CPU)硬件资源等问题,本文基于现场可编程逻辑门阵列(FPGA)技术,结合Verilog HDL语言设计了一种异步串口通信波特率自动检测方法,可实现快速、准确检测异步串口通信的波特率值。通过统计异步串口通信中每个高低电平脉冲宽度,并比较脉冲宽度的数值,得到异步串口通信过程中最小的脉冲宽度。利用不同波特率的每个比特位宽与时间的关系,计算最小电平脉宽对应的波特率。仿真和测试结果表明,FPGA通过接收异步串口通信的数据,能实现异步串口通信波特率的自动检测,最大误差不超过1%,不依赖CPU,具有高效和准确的特点。
For the problems of low efficiency,poor software portability,and even occupying central processing unit(CPU)hardware resources in conventional serial communication baud rate detection,this paper designs an automatic detection method for asynchronous serial communication baud rate based on field programmable gate array(FPGA)technology combined with Verilog HDL language to achieve fast and accurate detection of asynchronous serial communication baud rate value.The minimum pulse width in the process of asynchronous serial communication is obtained by counting the width of each high and low level pulse in asynchronous serial communication and comparing the value of pulse width.The baud rate corresponding to the minimum level pulse width is calculated using the relationship between each bit width and time for different baud rates.Simulation and test results show that the FPGA can achieve automatic detection of asynchronous serial communication baud rate by receiving data from asynchronous serial communication with a maximum error within 1%and without relying on CPU,proving its high-efficiency and accurate characteristics.
作者
陈虎
CHEN Hu(College of Information Engineering,Chengdu Aeronautic Polytechnic,Chengdu 610100,China)
出处
《应用科技》
CAS
2023年第2期60-65,共6页
Applied Science and Technology
基金
四川省科技计划项目(2021YFS0352,2021YFH0152).
