摘要
为了提高模数转换器(ADC)的性能,增强其系统的稳定性,设计一款高增益的宽带运算放大器非常重要,多级运算放大器因为不受芯片供电电压的影响而成为了热门的选择。基于SMIC 0.18μm CMOS工艺设计了一款三级CMOS运算放大器,同时在Cadence软件的仿真环境下针对该三级运算放大器的性能参数进行了仿真。结果表明:在1.8 V电源电压的条件下,该三级运算放大器的增益达到了99.5 dB,单位增益带宽66 MHz,相位裕度69°,共模抑制比69 dB,电源电压抑制比95 dB,从结果来看,获得了更高的增益。
In order to improve the performance of analog-to-digital converters(ADCs)and enhance the stability of their systems,it is crucial to design a high gain broadband operational amplifier.Multistage operational amplifiers have become a popular choice because they are not affected by chip supply voltage.Based on SMIC 0.18μm,A three-level CMOS operational amplifier was designed using the CMOS process,and its performance parameters were simulated in the simulation environment of Cadence software.The results show that under the condition of 1.8 V power supply voltage,the gain of the three-stage operational amplifier reaches 99.5 dB,the unit gain bandwidth is 66 MHz,the phase margin is 69°,the common mode rejection ratio is 69 dB,and the power supply voltage rejection ratio is 95 dB.From the results,the higher gain were obtained.
作者
张州
ZHANG Zhou(Heilongjiang Vocational Institute of Ecological Engineering,Harbin 150025,China)
出处
《黑龙江生态工程职业学院学报》
2023年第3期51-53,66,共4页
Journal of Heilongjiang Vocational Institute of Ecological Engineering
