摘要
基于65 nm CMOS工艺设计了一款33.5~37.5 GHz的6 bit有源矢量合成型移相器(VSPS)。该移相器采用Lange类型的90°耦合器作为I/Q信号发生器,其中的电感采用8字形电感实现;此外,矢量合成部分采用电流合成结构,使芯片面积更加紧凑。后仿真结果显示,该移相器覆盖360°移相范围,对于64种移相角度状态,其整个工作频带下的相位均方根(RMS)误差约为0.33°~3.20°,移相附加增益幅度约为-8.38~-4.89 dB,其RMS误差小于0.59 dB,噪声系数约为12.55~15.55 dB,输入反射系数小于-15 dB,输出反射系数小于-7.9 dB,在33.5、35.5和37.5 GHz频率下,其1 dB压缩点输入功率分别为-1.38~0.96、-1.13~0.75和-0.30~1.40 dBm。该移相器核心电路面积仅约为0.11 mm^(2),在1.2 V的电源电压下,消耗14.6 mW的直流功率,具有面积紧凑、功耗较低、插入损耗适中且精度较高的优势,有利于相控阵系统大规模集成和应用。
A 33.5-37.5 GHz 6 bit active vector-sum phase shifter(VSPS)based on 65 nm CMOS process was designed.The phase shifter adopted a Lange type 90°coupler as its I/Q signal generator,the inductors of which were realized by 8-shaped inductors.In addition,the vector-sum part of the phase shifter adopted the current-combining structure,which further reduced the chip area of the VSPS.The post simulation results show that the phase shifter covers a 360°phase shift range.For 64 phase-shifting states,the root-mean-square(RMS)phase error in the entire operation frequency band is about 0.33°-3.20°,the phase-shifting additional gain amplitude varies from about-8.38 dB to-4.89 dB,and its RMS error is less than 0.59 dB.The noise figure varies from about 12.55 dB to 15.55 dB,with input reflection coefficient of less than-15 dB and output reflection coefficient of less than-7.9 dB.The input power at 1 dB compression point is-1.38-0.96,-1.13-0.75 and-0.30-1.40 dBm at 33.5,35.5 and 37.5 GHz respectively.The core circuit area of the phase shifter is only about 0.11 mm^(2),and it consumes 14.6 mW DC power under a 1.2 V power supply,with the advantages of compact area,low power consumption,moderate insertion loss and high precision,which is conducive to the large-scale integration and application of phased array system.
作者
李印
吴锐
Li Yin;Wu Rui(National Key Lab of Microwave Imaging Technology,Aerospace Information Research Institute,Chinese Academyof Sciences,Beijing 100094,China;School of Electronic,Electrical and Communication Engineering,University of Chinese Academy of Sciences,Beijing 100049,China)
出处
《半导体技术》
CAS
北大核心
2023年第2期123-131,共9页
Semiconductor Technology
基金
中国科学院百人计划基金资助项目(2020000612)
国家重点研发计划项目(2019YFA0210204)。
