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基于FPGA中双锁相环IP核的重力仪干涉条纹和时间间隔测量方法

Interference Fringes and Time Interval Measurement Method for Gravimeter Based on Dual Phase-Locked Loop IP Core in FPGA
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摘要 介绍了FPGA在绝对重力仪中对落体下落时间和距离进行的测量原理及方法,阐述了以Altera公司Cyclone IV系列的EP4CE6E22C8N芯片为核心,构造的可编程片上系统以及倍频移相测时法的实现过程,该测时技术对重力仪中落体在一次大约200 m下落过程中的测量误差为±0.6 ns,测量标准不确定度为0.308 ns,分辨力可达到0.4 ns,提高了现有绝对重力仪的时间测量精度,通过仿真软件与实验数据验证了设计的正确性和有效性。 The principle and method of measuring falling time and distance of the falling body in the absolute gravimeter by FPGA are introduced, and the programmable system-on-chip based on Altera Cyclone IV series EP4CE6E22C8N chip and the implementation process of frequency doubling phase shift timing method are described. The measurement error of the falling body in the gravimeter during a falling process of about 200m is ± 0.6ns. The standard uncertainty of measurement is 0.308ns, and the resolution can reach 0.4ns, which improves the accuracy of the existing absolute gravimeter. Finally, the correctness and effectiveness of the design are verified by simulation software and experimental data.
作者 张博 ZHANG Bo(Heilongjiang Institute of Metrological Verification and Testing,Harbin 150028,China)
出处 《计量科学与技术》 2022年第12期61-66,40,共7页 Metrology Science and Technology
基金 国家重点研发计划项目(2018YFF0212401)。
关键词 FPGA 倍频移相 时间间隔测量 重力仪 干涉条纹 FPGA frequency doubling phase shift time interval measurement gravimeter interference fringe
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