摘要
异构多核技术的发展使微处理器的性能有了较大提升,而处理器与外部存储器之间的带宽差异限制了处理器的性能发挥,“存储墙”问题日益严重。针对一种用于高密度计算的异构多核SoC系统,文中提出了一套存储设计方案。该方案通过复用一些长时间闲置的本地空闲存储资源作为二级共享缓存来增加访存带宽,减少访问外部存储频率。分布式高速共享二级缓存结合多路并行访问外部存储的层次化存储结构,缓解了系统处理数据与外部存储器间的速度差异,提高了数据的存取效率,优化了系统的性能。综合资源消耗和计算效率,文中所提设计相比普通二级缓存节约了69.36%的片上SRAM资源,相比无缓存结构提高了41.2%的加速比,整体任务计算时间平均减少了约40.6%。
The performance of microprocessors has been greatly improved by the development of heterogeneous multi-core technology.The bandwidth difference between the processor and external memory severely limits the performance of the processor,and the"Memory Wall"problem is becoming increasingly serious.For a heterogeneous multi-core SoC system in high-density computing,this study proposes a set of memory design scheme.The solution increases memory access bandwidth and reduces the frequency of accessing external memory by reusing some local free memory resources that have been idle for a long time as shared L2 cache.Meanwhile,the distributed high-speed shared L2 cache combined with the hierarchical storage structure of multi-channel parallel access to external storage alleviates the speed difference between system processing data and external storage,improves data access efficiency,and optimizes system performance.In terms of resource consumption and computing efficiency,the proposed design saves 69.36%of on-chip SRAM resources compared with ordinary L2 cache,provides 41.2%speedup ratio compared with non-cache structure,and reduces the overall task calculation time by about 40.6%on average.
作者
张玄
张多利
宋宇鲲
ZHANG Xuan;ZHANG Duoli;SONG Yukun(School of Electronic Science and Applied Physics,Hefei University of Technology,Hefei 230009,China)
出处
《电子科技》
2022年第9期44-51,共8页
Electronic Science and Technology
基金
国家自然科学基金(61874156)
安徽省高校协同创新资助项目(GXXT-2019-030)。
关键词
异构多核
存储墙
复用
多路并行
层次化存储
二级缓存
分布式
外部存储器
heterogeneous multicore
memory wall
multiplexing
multiplexed parallelism
hierarchical memory
L2 cache
distributed
external memory
