摘要
高速串行接口是提高高性能互连网络带宽的关键技术,而信道均衡器则是提高信号完整性的核心部件。利用现代数字信号处理(DSP)结构,提出了基于深度神经网络(DNN)的高速信道均衡研究方法,此方法在面向未来50 GB以上的高速信道时,克服了传统判决反馈均衡器(DFE)的判决速度受限于反馈回路的固有缺陷问题。仿真结果表明,在采用PAM4编码方式,高速信道波特率为28 GB,信道损耗为15 dB,或者波特率为56 GB,信道损耗为30 dB时,与传统的15阶FFE组合2阶DFE的均衡器结构相比,本文所提出的3层DNN结构,具有更好的均衡效果,以及更快的均衡收敛速度。
High-speed serial interface is a key technology to improve the bandwidth of high-performance interconnection networks,and the channel equalizer is the core component to improve signal integrity.This paper uses the modern digital signal processing(DSP)structure to propose a deep neural network(DNN)-based high-speed channel equalization research method.This method overcomes the inherent shortcoming that the decision speed of the traditional decision feedback equalizer(DFE)is limited by the feedback loop when facing high-speed channels above 50GB in the future.The simulation results show that,compared with the traditional 2-tap DFE architecture with 15-tap FFE,the proposed 3-layer DNN structure has better equalization effect and faster equalization convergence speed,when the PAM4 encoding method is used,the high-speed channel baud rate is 28GB,and the channel loss is 15dB,or the baud rate is 56GB and the channel loss is 30dB.
作者
翦杰
罗章
赖明澈
肖立权
徐炜遐
JIAN Jie;LUO Zhang;LAI Ming-che;XIAO Li-quan;XU Wei-xia(College of Computer Science and Technology,National University of Defense Technology,Changsha 410073,China)
出处
《计算机工程与科学》
CSCD
北大核心
2022年第4期605-610,共6页
Computer Engineering & Science
基金
国家重点研发计划(2018YFB2202303)
并行与分布处理重点实验室基金(6142110200301)。
