摘要
采用Sentaurus Process工艺仿真工具,验证了超薄硅膜内单次纵向离子注入并快速热退火后所实现的轻掺杂杂质分布符合高斯规律。设计杂质纵向高斯分布的轻掺杂纳米UTBB-SOI MOSFET,用虚拟阴极处反型载流子浓度来定义阈值电压的方法,为器件建立二维阈值电压解析模型。通过与Sentaurus Device器件仿真结果对比分析,发现:阈值电压模型能准确预测器件在不同掺杂、器件厚度和偏置电压下的阈值电压,正确反映器件的背栅效应,其模拟结果与理论模型相符。
The equivalence of the one-dimensional(1-D)Gaussian-form to the vertical impurity profile within the ultra-thin silicon film is proved by using Sentaurus Process simulator,which is implemented by combining a perpendicular ion implantation and a rapid thermal annealing(RTA).Then an insightful study of the virtual cathode is performed for the UTBB SOI MOSFETs with a vertical Gaussian doping of impurities.The coordinates of virtual cathode for the nanometer UTBB-SOI MOSFET with a vertical Gaussian doping profile is derived by employing Sentaurus device simulator.The two-dimensional(2D)analytical compact threshold voltage model is derived based on a virtual cathode.The accuracy of the model has been verified by 2D numerical device simulation using Sentaurus device simulator.Applying the newly developed model,the threshold voltage sensitivities to channel length,silicon-film thickness,buried-oxide thickness,and the channel doping concentration have been comprehensively investigated.Good agreements are achieved.This work has both theoretical and practical significance and provides aids in promoting theoretical modeling research and applications of new UTBB-SOI based devices.
作者
韦素芬
陈红霞
李诗勤
黄长斌
刘璟
WEI Sufen;CHEN Hongxia;LI Shiqin;HUANG Changbin;LIU Jing(School of Information Engineering,Jimei University,Xiamen 361021,China;Rockchip Electronics Corporation Limited,Fuzhou,350003,China)
出处
《集美大学学报（自然科学版）》
CAS
2021年第5期472-480,共9页
Journal of Jimei University：Natural Science
基金
福建省自然科学基金引导性项目(2019H0022)。
