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5 nm MSOA RapidPDK及物理实现

5 nm physical implementation with MSOA RapidPDK
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摘要 随着当今电子行业的发展,对SoC芯片,尤其是数模混合芯片的要求越来越高。和传统的DEF/GDS数据交互方式相比,Mixed Signal Open Database(MSOA)RapidPDK可以帮助设计人员通过相同的PDK更好地完成数字工具Innovus和模拟工具Virtuoso之间的数据传递。首先描述了5 nm MSOA RapidPDK生成方式,其次使用生成的PDK实现5 nm IP物理实现,同时验证MSOA flow对5 nm设计在版图完成和交付方面的速率提升。 Success in today′s electronics market place,most SoCs currently being developed have analog or mixed signal blocks,many so-called analog blocks actually have digital-control logic.Virtuoso-innovus flow with MSOA RapidPDK allows for all or parts of the physical hierarchy to pass back and forth between Virtuoso and Innovus easily without having to generate a DEF/GDS file.In this paper,we firstly describe the way to generate 5 nm RapidPDK,then use this PDK with digital flow to finish 5 nm IP design with custom lib.Additionally,this Virtuoso-innovus flow provides our analog designers with advanced techniques for 5 nm floorplanning,pin optimization,track generation and auto place&routing with RC extraction and timing analysis aware which will simplify the flow to enable virtuoso users to run 5 nm layout implementation,and also could help us to do full chip STA analysis.
作者 贺恺华 丁学伟 He Kaihua;Ding Xuewei(IP Design Department of Sanechips Technology Co.,Ltd.,Shenzhen 518055,China;State Key Laboratory of Mobile Network and Mobile Multimedia Technology,Shenzhen 518055,China)
出处 《电子技术应用》 2021年第8期59-63,67,共6页 Application of Electronic Technique
关键词 MSOA RapidPDK 5 nm 物理实现 VIRTUOSO Innovus MSOA RapidPDK 5 nm Virtuoso Innovus
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