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高速并行2倍符号速率采样数字成形滤波实现及分析 被引量:2

Implementation and Analysis of High Speed Parallel Digital Shaping Filter Based on 2 Times Sampling
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摘要 随着数传系统传输信息量的不断增大,需使用8PSK等高阶调制和成形滤波相结合进行传输。基于FPGA和高速DAC的数字成形滤波由于具有参数灵活可配置、适应性强等众多显著优势,正逐渐取代传统的模拟滤波器。由于传输速率很高,成形滤波采样倍数选择通常不能太高。为减轻DAC采样压力,减小FPGA与DAC之间传输数据速率,设计基于2倍符号速率采样的数字成形滤波器并通过查找表与并行滤波相结合的方法进行实现,所占用FPGA资源明显小于3倍采样。构建测量系统进行实物测试,测试结果表明:在8PSK 700Msps符号速率(信息速率2.1Gbps)传输条件下,进行2倍采样时,星载调制器EVM达到10.3%,动态幅度不平衡0.095dB,相位不平衡2.034°,主要性能指标满足工程应用使用需求。EVM虽稍差于3倍采样,但DAC采样频率降低了1/3,减小了FPGA与DAC之间传输数据速率,进而提升了传输效率,为后续星载高速调制器研制提供了参考,在高速率传输时具有广阔的应用前景。 As the great increase of information in high speed data transfer system,8psk modulation and shaping filter is applied.Digital shaping filter based on FPGA and DAC is taking place of traditional analog filter due to its easy configuration and adaptability.Owing to high speed data transmission,the sampling rate should not too high.To reduce the pressure of DAC sampling and the data rate between FPGA and DAC,a digital shaping filter based on 2-times sampling is designed and implemented by combining look-up table with parallel filtering.A measurement system is builted for physical test,the results show that under the transmission condition of 8PSK 700Msps symbol rate(information rate 2.1Gbps),the EVM of spaceborne modulator reaches 10.3%,dynamic amplitude imbalance is 0.095dB,phase imbalance is 2.034°,and the main performance indexes meet the needs of engineering application.Though EVM a bit lower than 3 times,sampling rate of DAC cuts down 1/3 and thus decreases the transfer speed between FPGA and DAC.The result supplies guidance for the development of spaceborne high-speed modulator and has extensive prospects in high-speed transmission.
作者 胡西阁 张伟 王瑞 靳凡 王宇 HU Xige;ZHANG Wei;WANG Rui;JIN Fan;WANG Yu(China Academy of Space Technology(Xi’an),Xi’an 7100000,China)
出处 《空间电子技术》 2020年第5期40-44,共5页 Space Electronic Technology
基金 国家自然科学基金(编号:61801377)。
关键词 并行 2倍采样 成形滤波 高速调制器 Parallel 2 times sampling Shaping filter High speed modultor
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