摘要
通过化学气相沉积法,采用不同生长工艺在4°偏角4H-SiC衬底上制备p型4H-SiC同质外延片。提出了p型4H-SiC同质外延中有效层厚度的概念,研究发现导致外延有效层厚度减少的直接原因是自掺杂效应的存在。采用傅里叶红外光谱仪(FT-IR)、汞探针电容电压(Hg-CV)和表面缺陷测试仪对p型4H-SiC同质外延片进行表征,讨论了不同工艺对外延有效层厚度的影响。结果表明,采用隔离法和阻挡层法均能提高外延有效层厚度,且掺杂浓度随距表面深度变化斜率值由1.323减小到0.073。然而,阻挡层法斜率值能进一步优化至0.050,是由于有效抑制了外延中固相和气相自掺杂。对比于优化前工艺,采用阻挡层法制备的p型4H-SiC同质外延片厚度不均匀性和表面总缺陷数量处于同一水平,掺杂浓度不均匀性由2.95%改善到2.67%。综上,采用阻挡层法能够制备出高有效层厚度、高一致性和高质量的p型4H-SiC同质外延片。
The p-type 4 H-SiC homo-epitaxial wafer was grown on the 4 H-SiC substrate at 4° offaxis by using the chemical vapor deposition method with different growth processes.The conception of effective layer thickness was presented in the p-type 4 H-SiC homo-epitaxial wafer.It is found that the reduction of effective layer thickness is due to the self-doping effect.The p-type 4 H-SiC homo-epitaxial wafer was characterized by Fourier transform infrared spectroscopy(FTIR),mercury probe capacitance voltage(Hg-CV)and surface defect inspection instrument,and the influences of different processes on effective layer thickness of the epitaxy were discussed.The results show that the effective layer thickness of the epitaxy can be increased using the segregation and barrier layer methods,and the slope value between doping concentration and depth from the surface is decreased from 1.323 to 0.073.However,the slope value can be further optimized to 0.050 by using the barrier layer method,which is due to the effective suppression of self-doping of solid phase and gas phase during epitaxial growth.Compared with the process before optimization,the thickness non-uniformity and total surface defect of the p-type 4 H-SiC homo-epitaxial wafer by barrier layer method are at the same level,and the doping concentration non-uniformity is improved from 2.95%to 2.67%.In summary,the p-type 4 H-SiC homo-epitaxial wafer with high effective layer thickness,high uniformity and high quality can be prepared with the barrier layer method.
作者
杨龙
赵丽霞
吴会旺
Yang Long;Zhao Lixia;Wu Huiwang(Hebei Poshing Electronics Technology Co.,Ltd.,Shijiazhuang 050200,China;.2.Hebei Key Laboratory of New Semicond uctor Materials,Shijia zhuang 050200,China)
出处
《微纳电子技术》
北大核心
2020年第4期277-281,共5页
Micronanoelectronic Technology
关键词
p型4H-SiC同质外延片
有效层厚度
阻挡层法
隔离法
自掺杂
p-type 4H-SiC homo-epitaxial wafer
effective layer thickness
barrier layer method
segregation method
self-doping
