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一种基于CPLD的通用时统信号板的研制

The development of universal time series signal board base on CPLD
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摘要 针对采用多片IC芯片进行逻辑组合实现的时统信号板存在时统信号同步电路复杂、同步精度低、脉冲周期和脉冲宽度不能二次调整、电路修改困难等缺点,提出了以可编程逻辑器件CPLD为主芯片,产生不同周期的时统信号,提高时统信号同步精度、调整脉冲宽度、收发多路差分时统信号等问题的一种时统信号板的设计原理和实现方法,具有在线更新逻辑、同步精度高、程序控制灵活、电路简单、可靠性高等特点,在火控系统中得到广泛应用,取得良好的效果。 In view of the disadvantages of the time series signal board, which is realized by logic combination with multiple IC chips, such as complex time series signal synchronization circuit, low synchronization accuracy, unadjustable pulse period and pulse width, and difficult circuit modification.This paper presents a design idea and implementation method of time series signal board based on CPLD, which can generate time series signals of different periods, improve the synchronization accuracy of time series sig-nals, adjust the pulse width, send or receive multiple differential time series signals.It has the characteristics of on-line updating logic, high synchronization accuracy, flexible program control, simple circuit and high reliability.
作者 吕文发 Lv Wenfa(Jiangsu Automation Research Institute of CSIC,Lianyungang 222006,China)
出处 《电子技术应用》 2020年第3期61-65,共5页 Application of Electronic Technique
关键词 时统信号 同步 电路 time series signals synchronization circuit
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