摘要
在高速图像数据传输系统中,针对图像数据"高吞吐量"与"大容量"数据缓存的应用需求,提出了一种基于DDR2 SDRAM的高速图像数据传输系统设计方案。为了满足图像数据的高吞吐率要求和数据缓存的大容量需求,采用了FPGA内部FIFO资源搭配片外DDR2的分级缓存机制;为了方便对图像数据的读写与地址的管理,对DDR2内部存储空间进行了重新分布。经测试,该系统可在上位机实时显示图像数据,且稳定可靠。
In the high-speed image data transmission system, a high-speed image data transmission system design scheme based on DDR2 SDRAM is proposed for the high throughput of image data and the application of " large capacity " data buffer. In order to meet the high throughput requirements of image data and the large capacity requirements of data caching, FPGA internal FIFO resources with off-chip DDR2 hierarchical cache mechanism is adopted. In order to facilitate the reading and writing of image data and the management of addresses, the internal storage space of DDR is redistributed. After testing, the system can display image data in real time on the host computer, which is stable and reliable.
作者
任勇峰
张泽芳
王国忠
张凯华
Ren Yongfeng;Zhang Zefang;Wang Guozhong;Zhang Kaihua(National Key Laboratory for Electronic Measurement Technology,North University of China,Taiyuan 030051,Shanxi)
出处
《电子技术应用》
2020年第1期62-65,共4页
Application of Electronic Technique
