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VDMOS功率器件用200mm硅外延片工艺研究 被引量:7

Study on Process of 200 mm Silicon Epitaxial Wafer for VDMOS Power Device
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摘要 200 mm尺寸的硅外延片是制备VDMOS功率器件的关键材料,其均匀性、结晶质量等材料技术指标与器件耐压、正向导通特性等电学性能密切相关,因此对大尺寸外延层的参数控制水平提出了严格要求。但由于反应区域面积较大、涉及反应因素条件较多,传统外延工艺下边缘参数偏离目标值5%~10%,无法满足器件要求,各项工艺条件的配合度成为亟待解决的技术问题。通过外延系统流场和热场的优化,可将外延片内的厚度和电阻率不均匀性控制在3%以内,并且结晶质量良好,实现了高质量200 mm硅外延片的生长。 The silicon epitaxial wafer of 200 mm size is the key material for preparing the VDMOS power device,its uniformity and crystallization quality are closely related to the electrical properties of the device,such as the voltage-resisting and the guide-pass characteristic,so the strict requirement is put forward for the parameter control level of the large-scale epitaxial layer.However,due to the large area of the reaction area and the conditions of the reaction factors,the edge parameters of the traditional epitaxial process deviate from the target value 5%~10%,which can not adapt to the requirements of the device,and the coordination degree of each technological condition becomes a technical problem to be solved urgently.Through the optimization of the epitaxial system flow field and the thermal field,the epitaxial wafer’s thickness and the resistivity nonuniformity are controlled within 3%,and the good crystallization quality is maintained,and the growth of the high quality 200 mm silicon epitaxial wafer is achieved.
作者 李明达 LI Mingda(The 46 th Research Institute of China Electronics Technology Group Corporation,Tianjin 300220,China)
出处 《天津科技》 2018年第12期25-28,共4页 Tianjin Science & Technology
关键词 硅外延片 晶体缺陷 均匀性 silicon epitaxial wafer crystal defect uniformity
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