摘要
延迟锁相环(DLL)在DDRnSDRAM内存控制器的设计中具有广泛应用。传统延迟锁相环(DLL)在DDRn SDRAM电源关闭模式(PowerDownMode)退出时,由于电源波动较大会导致VCLK和DQS的上升沿无法对齐。基于此,笔者提出了具有滤波功能的延迟锁相环(DLL),在电源关闭模式(PowerDownMode)退出时,能够自动加快延迟链的更新速度,以保证VCLK和DQS的上升沿尽快对齐,确保芯片得到更好的输出眼图,提高芯片读写质量。
Delay-Lock Loop(DLL)has been widely used in DDRn SDRAM control circuits design.Traditional DLL can't make the rising edge of VCLK and DQS aligned because of big Power variations when DDRn SDRAM Power down mode exit.A new Delay-Lock Loop(DLL)with filter function is realized in this paper.It can speed up DLL update speed automatically when Power down mode exit,make sure the rising edge of VCLK and DQS aligned;So DDRn SDRAM chip which use this new DLL can get better output data-eye and better read write quality.
作者
安九华
庞理
张涛
尹萍
宋炜哲
An Jiuhua;Pang Li;Zhang Tao;Yin Ping;Song Weizhe(Xi'an Unilc Semiconductors Co., Ltd., Xi'an Shaanxi 710075, China)
出处
《信息与电脑》
2018年第23期149-152,共4页
Information & Computer
