摘要
为了提高FPGA仿真器的运行速度,降低硬件设计成本,通过对现有仿真器的硬件电路结构和原理进行深入研究,提出并构造了一种高性能、低成本的新型FPGA仿真器设计实现电路。与传统仿真器硬件设计相比,该电路功能仅由一片单片机(PIC18F14K50)得以实现,电路芯片数量变少,成本降低,电路结构更简单,固件烧写操作更易。利用该设计电路完成的FPGA仿真器经测试证明,其电路设计完全正确,运行效果有明显改进,稳定性更好,速度更快,是传统设计方案的3-5倍,设计成本仅为十分之一。
In order to improve the running speed and reduce the cost of hardware design of FPGA simulator, by in-depth study on the structure and principle of the simulator's hardware circuit, giving and building a high performance, low cost implementation circuit design of new FPGA simulator. With the traditional simulator hardware design, the circuit function can be achieved only by a single chip(PIC18F14K50), and chip quantity is less, cost reduction, circuit structure is more simple, the firmware writing operation more easy. After verification, the simulator download speed is 3-5 times than traditional circuit, design cost is only 1/10.
出处
《电子制作》
2014年第19期2-3,共2页
Practical Electronics
