摘要
根据PCI Express 2.0协议,介绍了PCI Express总线的基本概念,并着重对物理层的基本功能以及内部构成进行了详细说明。在此基础上,采用自顶向下的设计方法,完成了物理层中关键的MAC子层部分的电路设计。另外还搭建了一套验证平台,可自动生成数据包并进行比对,完成了模块的功能验证。最后使用FPGA进行验证,PCIe接口可以正常工作,设计达到了预期的目标。目前用户时钟已稳定工作在250 MHz,可以满足大部分系统数据处理的需求。
The paper is according to the PCI Express protocol, introduces the basic concepts of PCI Express bus and focuses on the basic function and structure of physical layer.On this basis, using TOP-DOWN design method,finish the circuit design of the MAC sub-layer,key part of physical layer.Additionally, we have build a verify platform, can automatically generate data packets and compare, finish the function verification.The circuit has passed FPGA verification after synthesis, PCIe interface can work normally. The design achieves the expected goal.Now theuser clock can work well at 250 MHz,can meet the most system's data process requirements.
出处
《电子与封装》
2015年第10期20-25,共6页
Electronics & Packaging
