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FPGA异构加速卡电源完整性分析 被引量:5

Power Integrity Analysis of FPGA Heterogeneous Accelerate Board
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摘要 以现场可编程门阵列(FPGA)为核心构建了高性能、高密度异构加速卡.基于目标阻抗设计方法,对解耦电容和电路进行了交流和直流分析,并给出了电源完整性后仿结果,验证了该分析方法的有效性.最后给出了该FPGA异构加速卡在图像识别中的应用实例,并与中央处理器、图形处理器的性能作了对比. A high performance and high density field programmable gate array( FPGA) heterogeneous accelerate board was proposed. Base on target impedance design method,the AC/DC characteristics were analyzed and power integrity post simulation was present. Application on image identification utilized the proposed heterogeneous FPGA accelerate board and performance comparison are given.
作者 杨正 阚宏伟 刘铁军 张闯 YANG Zheng;KAN Hong-wei;LIU Tie-jun;ZHANG Chuang(Architecture Research Department,Inspur Group Company Limited,Jinan 250000,China;Stale Key l.aboratory of High-End Server and Storage Technology,lnspur Group Company l,imited,Beijing 100085,China)
出处 《北京邮电大学学报》 EI CAS CSCD 北大核心 2018年第4期76-80,共5页 Journal of Beijing University of Posts and Telecommunications
关键词 电源完整性 电源分配网络 目标阻抗 解耦电容 power integrity power distribution network target impedance decoupling capacitor
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