4FAN Yiping. Modeling and simulation of ΣΔ frequency synthesizers [A]. IEEE International Symposium on Industrial Electronics [C]. Pusan, South Korea: IEEE, 2001. 684-689. 被引量：1
5Rhee W, Song B, Ali A. A 1.1 GHz CMOS fractional-N frequency synthesizer with a 3b third-order delta-sigma modulator [J]. IEEE Journal of Solid-State Circuits, 2000, (10): 1453-1460. 被引量：1
6Miller B, Conley R J. A multiple modulator fractional divider [J]. IEEE Trans on Instrumentation and Measurement, 1991, 40(6): 578-583. 被引量：1
7Galton I. Delta-sigma data conversion in wireless transceivers [J]. IEEE Trans on Microwave Theory and Techniques, 2002, 50(1): 302-315. 被引量：1
8AD9958 DATA SHEET: Analog Devices,Inc. 2007. 被引量：1
