摘要
为提升基于PIN电学结构载流子注入式硅基电光调制器性能,采用TSMC 0.18μm CMOS工艺设计一种新型预加重驱动电路.该电路采用电流模逻辑(CML)结构,并引入低压差分信号(LVDS)型电流选择器,在实现提升响应速度和工作带宽的同时,降低整体平均功耗.仿真结果表明:基于PIN电学结构载流子注入式硅基电光调制器的电压响应时间同时受预加重驱动信号过冲幅度和持续时间影响.当预加重驱动信号过冲幅度和持续时间分别取值为2 V和0.2 ns时,基于PIN电学结构载流子注入式硅基电光调制器的电压响应时间缩减了16.7%,工作带宽扩展至4.34倍,且根据不同的开关活动性需求,平均功耗最高降低了60%.
In this paper, a new pre-emphasis driving circuit is designed with the 0.18 μm TSMC CMOS technique to improve the performance of PIN-diode-based silicon electro-optic modulator. The pre-emphasis circuit adopts the Current Mode Logic（CML） in which a Low Voltage Differential Signaling（LVDS） module is engineered to act as a current selector so as to achieve high-speed operation with broadband and low power consumption. The simulation results show that the electrical response time of PIN-diode-based silicon electro-optic modulator depends on the overshoot amplitude and overshoot duration of the pre-emphasis driving signal. When both values of an overshoot amplitude and an overshoot duration are set to be 2 V and 0.2 ns respectively and driven by the proposed pre-emphasis circuit, the electrical response time of PIN-diode-based silicon electro-optic modulator is reduced by 16.7%, and the operating bandwidth is nearly 4.34 times the intrinsic bandwidth. In addition, judged by the varying requirements for the switching activity, the average power consumption can be reduced by 60% at most.
出处
《宁波大学学报（理工版）》
CAS
2017年第2期66-71,共6页
Journal of Ningbo University：Natural Science and Engineering Edition
基金
国家自然科学基金(61307071)
教育部高等学校博士学科点专项科研基金(20133305120004)
浙江省科技厅公益性技术应用研究计划项目(2013C31083)
关键词
硅基电光调制器
PIN结
预加重
电流模逻辑
低压差分信号预加重
silicon electro-optic modulator
PIN diode
pre-emphasis
current mode logic
low voltage differential signaling
