摘要
随着超大规模集成电路向着高密度、高频方向发展,保证高速信号的可靠传输成为封装电学设计中的关键。完成了一款转换速率为2.5 GS/s的14 bit DAC陶瓷外壳封装设计,利用芯片、封装和PCB的协同设计,保证了关键差分信号路径在2.5 GHz以内插入损耗始终大于-0.8 d B,满足了高速信号的传输要求;并结合系统为中心的协同设计和仿真,对从芯片bump到PCB的整个传输路径进行了仿真和优化,有效降低了信号的传输损耗和供电系统的电源地阻抗。
As very large scale IC towards high density and high frequency, high speed signal reliable transmission becomes the key of package electrical design. Using the co-design method of die, PCB and package, this paper completes ceramic package of a 14 bit, 2.5 GS/s DAC. The insertion loss of critical differential signal can keep above -0.8 dB in the frequency of 2.5 GHz, the transmis- sion demand of high speed signal is satisfied. Then, using system-central co-design and co-simulation, the transmission paths from bump to PCB are simulated and optimized, the transmission loss and the impedance of PDN are reduced effectively.
作者
王德敬
赵元富
姚全斌
曹玉生
练滨浩
胡培峰
Wang Dejing Zhao Yuanfu Yao Quanbin Cao Yusheng Lian Binhao Hu Peifeng(Beijing MXTronics Corporation, Beijing 100076, China Beijing Microelectronics Technology Institute, Beijing 100076, China)
出处
《电子技术应用》
北大核心
2017年第1期16-19,共4页
Application of Electronic Technique
