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基于NiosⅡ的FPGA频率计设计与实现 被引量:12

Design and Implementation of FPGA Frequency Meter Based on NiosⅡ
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摘要 文中主要介绍一种以FPGA器件为控制核心的高精度数字频率计,其中待测信号经过输入缓冲电路,由FPGA采集并计数处理,最终测量结果显示在触摸彩屏液晶上。设计基于NiosⅡ,把采集部分和控制部分很好地融合在一起,辅之等精度测频法、多周期测时间间隔法和多周期测占空比法,从而达到精确、实时测量的目的。经试验验证,该系统能实现对输入频率从1 Hz^200 MHz周期信号的周期、频率、占空比和时间间隔的测量,测量精度优于10-7,稳定性和实时性好。 A high precision digital frequency meter whose core control system is based on FPGA device was introduced in this paper.Having passed the input buffer circuit,the signal to be measured will be collected and counted by FPGA and the final measuring results will be displayed on color LCD touch screen.The design is based on NiosⅡ,the acquisition part and control part will well fuse,auxiliary with equal precision measuring frequency,multi cycle measuring time interval and multi cycle measuring duty ratio methods,so as to achieve the accurate and real-time results.Experiment shows that the system can measure the cycle,frequency,duty ratio and interval of the input periodic signal whose frequency ranges from 1 Hz to 200 MHz,the measurement accuracy is more than 10-7,and it has good stability and rea-time.
出处 《仪表技术与传感器》 CSCD 北大核心 2016年第8期105-108,112,共5页 Instrument Technique and Sensor
基金 国家重点基础研究发展计划(973计划)项目(2013CB834305) 国家自然科学基金科学仪器基础研究专款项目(11127508)
关键词 FPGA 等精度测频 多周期测占空比 多周期测时间间隔 FPGA equal precision frequency measurement multi cycle measuring duty ratio multi cycle measurement time interval
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