摘要
低噪声放大器是信号接收前段的重要部件,它的性能决定了整体接收机系统的信噪比。本文介绍了一种基于英飞凌公司的BFP740ESD放大器设计的宽带低噪声放大器的设计过程,采用2级芯片级联放大的方法,首先通过ADS2013建模仿真,确定放大器的原理图;然后根据原理图绘制PCB版图。实物测试结果得到,在2.3～2.5 GHz的范围内增益为32 d B左右。在室温下,噪声系数低于1.5 d B,在中心频率2.4 GHz时,输入端的S11达到-20 d B,达到预期设计要求,具有良好性能。
The low noise amplifier is an important part of the signal receiver. Its performance determines the SNR of the whole receiver system. This paper introduces a design process of a broadband low noise amplifier based on the BFP740 ESD chip of Infineon Corporation. The method of 2 stage chip cascade amplification is adopted. Firstly, the principle of the amplifier is determined by ADS2013 modeling simulation. Then, the PCB layout is drawn according to the schematic diagram.Test results are obtained, and the gain of 2.3~2.5GHz is about 32 d B. At room temperature, the noise figure is lower than 1.5d B, and the S11 reached-20 d B at the center frequency 2.4 GHz,and the input terminal achieves the expected design requirements, and has good performance.
出处
《电子设计工程》
2016年第18期172-174,共3页
Electronic Design Engineering
