摘要
基于GALS结构的NoC节点间通常拥有较长的互连线,并且采用异步方式进行通信,对延迟匹配的要求较高。该文提出了一种内建自测试方法,完成跨时钟域互连链路的延迟测试问题。针对该方法完成了相应的测试电路以及测试矢量生成模块的设计与仿真,并在FPGA中实现该电路以验证测试电路的功能和性能。仿真与硬件验证结果都表明,所设计的测试电路以及ATPG模块能够实现NoC互连线延迟故障诊断的功能;该文的延迟故障诊断方法能够快速准确地发现互连线上存在的延迟故障。
There are quite long interconnection lines between the nodes of a network-on-chip （NoC） based on the globally asynchronous locally synchronous （GALS） structure. It is difficult to match the delay requirement for the communication with the asynchronous ways. In this paper, we propose a build-in self-test （BIST） method to solve the problem of interconnection delay fault across different clock domains. The test circuit and the module of automatic test pattern generation （ATPG） are designed and simulated. The circuit with FPGA is realized to verify the function and performance of the test circuit. The results of simulation and hardware verification indicate that test circuit and the module of ATPG can carry out the function of interconnection delay fault diagnosis of NoC, and the proposed method of interconnection delay fault diagnosis can detect the delay fault existed in the interconnection line rapidly and accurately.
出处
《电子科技大学学报》
EI
CAS
CSCD
北大核心
2016年第4期557-563,共7页
Journal of University of Electronic Science and Technology of China
基金
国家自然科学基金(61471047)
四川省科技计划(2013JY0192)
关键词
故障诊断
本地同步全局异步
互连线延迟
片上网络
fault diagnosis
globally asynchronous locally synchronous （GALS）
interconnection delay
network-on-chip （NoC）
