摘要
为更好地将串行RapidIO总线(SRIO)和相控阵技术应用于多通道短波通信系统中,提出一种基于Tsi578的SRIO互连交换系统的设计和实现方案,并对该系统的SRIO实验性能进行了测试。该交换单元采用DSP+FPGA结构,易于系统维护和扩展,且提升了系统的灵活性和运算效率。实验表明,该交换单元正常稳定工作,SRIO传输速度与传输数据包大小有线性关系,在传输1 024 Byte时达到最高速率496.941 2 Mbps。此外,文章总结了SRIO在工程应用中的三个问题,并提出了相关优化建议。
In order to apply Serial RapidIO bus（SRIO） bus and phased array technology to multichannel short-wave communication system, the design and implementation ot RapidIO interconnect swltcn system based on Tsi578 is proposed, and the test of SRIO＇s transmission speed in the system. This switch module adopts DSP ＋ FPGA structure, thus is easy for system maintenance and expansibility, and improves system flexibility and operation officiency. The test indicates that this switch module can work normally and reliably. There exists a linear relationship between transmission speed and the size of packet, and it could reach the peak value of 496.9412 Mbps when the size of packet is 1024 Byte. This paper also discusses several performance optimization strategies in SRIO engineering application.
出处
《通信技术》
2016年第7期937-942,共6页
Communications Technology
