摘要
设计了一种低损耗LTCC威尔金森功分器。采用低温共烧陶瓷技术,达到器件小型化设计的目的。利用交叉叠层的方法,减小了两路电路自身的寄生电容从而减小了功分器的插入损耗。为了验证该设计的可行性,采用这种结构设计制作通带为1 425-1 900 MHz的威尔金森功分器,加工后测得其插入损耗小于–3.25 d B,尺寸仅为3.2mm×1.6 mm×0.9 mm。
Used the technology of low temperature co-fired ceramics, a kind of low insertion loss Wilkinson power divider was designed. And it achieved the purpose of miniaturization of the device design. The insertion loss was decreased reducing the parasitic capacitance of the two circuits using the method of stratified stacked inductor. Used the approved structure, a power divider with pass band in 1 425-1 900 MHz was designed. Test results denote that the insertion loss is than -3.25dB, and the size is only 3.2 mm×1.6 mm×0.9 mm.
出处
《电子元件与材料》
CAS
CSCD
2016年第7期49-52,共4页
Electronic Components And Materials
关键词
低温共烧陶瓷
功分器
交叉叠层
低插损
寄生电容
小型化
LTCC
power divider
stratified stack
low insertion loss
parasitic capacitance
miniaturization
