摘要
本文的研究工作基于TI公司推出的达芬奇TMS320DM6446双核(ARM+DSP)微处理器芯片,围绕该处理器进行嵌入式视频系统的硬件设计以及视频编码算法的优化。文中在简要分析TMS32ODM6446硬件性能的基础上,介绍了各主要模块的硬件设计过程和注意事项。随后以该处理器为开发平台,运用线性汇编语言对AVS重构模块进行优化。调试结果表明,该硬件设计的性能稳定可靠,线性汇编效率较高,其周期数几乎只有C程序的1/3,可以更好的满足实时性的要求。
This article mainly introduces the hardware design of embedded video system and optimization of video coding algorithm, based on the DaVinci TMS320DM6446 dual-core （ARM ＋ DSP） microprocessor chips, which launched by TI company. On the basis of the brief analysis about TMS32ODM6446 hardware performance, this paper introduces the hardware design process of main module and the matters needing attention. Then taking the processor as development platform, optimizes the AVS reconstruction module by using linear assembly language. The experimental results show that the performance of the hardware design is stable and reliable, and the linear assembly language＇s periodic number is almost only the C program＇s 1/3, which has the high efficiency, and it can better satisfy the requirement of real-time.
出处
《新型工业化》
2011年第2期13-19,共7页
The Journal of New Industrialization
基金
国家自然科学基金资助项目基金(No.60772101)的资助
