摘要
为了解决多路高速数据的采集与存储问题,提出基于FPGA(Field Programmable Gate Array)和NiosⅡ软核技术的设计实现方法。将采集的数据和FPGA的配置数据共享配置存储器空间,可以节省额外的存储器件,降低系统成本。实验中以EP2C35F672C8为控制核心、AD7980为模数转换器、EPCS64为存储介质,实现了15路模拟信号的完全并行采集。该系统可实现对多路ADC(Analog-to-Digital Converter)的并行控制,从而实现多路信号的并行高速采集。由于采用了软核技术,使系统具有很高的灵活性和可扩展性。实验结果表明,此设计为要求成本低、系统升级频繁的工程提供了新的思路。
In order to realize parallel multi-channel high-speed data acquisition and storage,a method which is based on FPGA（ Field Programmable Gate Array） and Nios Ⅱ is proposed. This system can realize the parallel control of multi-channel ADCs（ Analog-to-Digital Converter）,to achieve parallel high-speed acquisition of multichannel signal. The data acquired and the FPGA configuration data can share the configuration memory,which can save the extra storage devices,and reduce the system cost. In the experiment,use EP2C35F672C8 as core,AD7980 as ADC,EPCS64 as the storage medium,to achieve entirely parallel acquisition for 15-channel analog signal. The adoption of soft core technology makes the system more flexible and extensible. The results show that it provides new ideas to projects which requires low cost,frequent system upgrade.
出处
《吉林大学学报（信息科学版）》
CAS
2015年第6期632-636,共5页
Journal of Jilin University（Information Science Edition）
基金
国家自然科学基金资助项目(21227008)
吉林省科技厅基金资助项目(20130102028JC)
关键词
NiosⅡ控制器
现场可编程门阵列
多路数据采集
高速
并行
串行存贮器
Nios Ⅱ controller
field programmable gate array（FPGA）
multi-channel data acquisition
high speed
parallel
erasable programmable configurable serial（EPCS）
