摘要
介绍了一种采用CSMC 0.153μm CMOS工艺制作的差分环形振荡器。分析了环形振荡器延时单元的选取和设计原理,以及输入差分对管跨导和负载电阻对环振相位噪声的贡献,得到负载为线性区偏置MOS管时低功耗低相位噪声环振的设计方法。在相位噪声变化较小时,采用电容阵列结构拓宽了环形振荡器频率的调谐范围。测试结果表明,该环形振荡器输出频率范围为513 MHz^1.8GHz;在振荡频率为1.57GHz频偏1MHz处,相位噪声为-84.11dBc/Hz,功耗为3.88mW。
A ring oscillator fabricated in 0. 153 μm CMOS technology was presented. It utilized β-multiplier circuits as reference current bias to achieve lower sensitivity to power supply noise. Also with the capacity array, frequency tuning range was broadened with smaller influence on phase noise. The selection and design of delay stage in ring oscillator was analyzed and low power low phase noise ring oscillator with linear biased MOS load was designed. Measurement results showed that the ring oscillator achieved a frequency tuning range of 513 MHz-- 1.8 GHz. The phase noise was -84.11 dBc/Hz at frequency of 1.57 GHz with 1 MHz offset, and the consumption was 3.88 mW.
出处
《微电子学》
CAS
CSCD
北大核心
2015年第6期731-734,共4页
Microelectronics
