期刊文献+

声音信号频谱检测仪设计 被引量:2

The Design of Voice Signal Spectrum Detector
下载PDF
导出
摘要 对声音信号进行频谱分析,是认识声音信号和处理声音信号的重要方法,因而基于声音信号频谱检测具有重要的意义。通过使用FPGA微处理器对声音信号频谱进行检测,并通过Altera公司的Quartus II软件、相关IP核以及硬件描述语言VHDL完成对声音信号的采集、量化、存储、快速傅里叶变换(FFT)、滤波、计算声强等一系列功能,通过测试实现了声音频谱的前端监测,同时结合VGA直观地显示动态信号特征,真正达到了对声音信号频谱的动态监测。经过实验验证,该设计可以准确检测出声音信号频谱并动态地显示出来。 Frequency spectrum analysis of the sound signal is an important method to understand the sound signal and the sound signal processing. So the study of sound signal based on spectrum detection becomes more and more important. In this article, the system makes sound signal spectrum detection come true by using FieldProgrammable Gate Array( FPGA) microprocessor. Using Altera company 's Quartus II software,IP core and hardware description language( VHDL),we have written a series of functional programs to control FPGA to realize the complete sound signal acquisition,storage,quantization,fast fourier transform( FFT),filtering,calculation of sound intensity. According to the test,we basically get the audio spectrum of the front end of the monitoring process. Meanwhile,in order to achieve a visual display,this study also discusses how to realize FPGA to drive VGA interface and integrate with the front end of the monitoring process,which really makes the sound signal spectrum of the dynamic monitoring come true. In this experiment,the design can detect sound signal spectrum accurately and the result can be displayed dynamically.
出处 《北京联合大学学报》 CAS 2015年第4期13-18,共6页 Journal of Beijing Union University
关键词 频谱检测仪 滤波 FPGA FFT IP核 Spectrum detector Filtering FPGA FFT IP core
  • 相关文献

参考文献7

二级参考文献20

  • 1宋宇鲲,王锐,胡永华,高明伦.使用排队论模型对FIFO深度的研究[J].仪器仪表学报,2006,27(z3):2485-2487. 被引量:10
  • 2班万荣.频谱分析仪的原理和发展[J].现代电子技术,2005,28(7):101-102. 被引量:31
  • 3刘桂华,傅佑麟,严平.FFT实时谱分析系统的FPGA设计和实现[J].电子技术应用,2005,31(4):65-67. 被引量:11
  • 4孙恺,王田苗,魏洪兴,陈友东.嵌入式CPU软核综述[J].计算机工程,2006,32(7):6-9. 被引量:16
  • 5DALLY W J, POULTON J W. Digital systems engineering [M]. Cambridge, UK: Cambridge University. Press, 1998. 被引量:1
  • 6BALCH M. Complete digital design[M]. New York: McGraw-Hill, 2003. 被引量:1
  • 7APPERSON R W. A dual-clock FIFO for the reliable transfer of high-throughput data between unrelated clock domains[D]. California: UC Davis, 2004. 被引量:1
  • 8COCHRAN A J, BAILEY P N, CARR L S. FIFO buffer depth estimation for asynchronous gapped payloads: United States Patent. US, 7227876B 1 [P]. 2007-06-05. 被引量:1
  • 9RHA Kyoungscok, CHOI Kiyoung. Arca-efficient buffer binding based on a novel two-port FIFO structure[C]// Proceedings of the Ninth International Symposium on Hardware/Software Codesign. Copcnhagcm: ACM, 2001: 122-127. 被引量:1
  • 10APPERSON R W, YU Z, MEEUWSEN M J, et al. A scalable dual-clock FIFO for data transfers between arbitrary and haltable clock domains[J]. IEEE Transactions on Very Large Scale Integration (VLS1) Systems, 2007, 15(10): 1125-1134. 被引量:1

共引文献26

同被引文献7

引证文献2

二级引证文献3

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部