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基于CUDA的三维芯片温度场实时可视化 被引量:2

CUDA-Based Real-Time Visualization for Temperature Field of 3D Chips
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摘要 温度是三维(3D)集成的重要设计约束,温度场可视化对于3D芯片热设计与任务调度等工作具有重要意义。为了对3D芯片温度分布进行实时可视化分析,开展了如下研究:使用连续过松弛(SOR)算法进行并行全芯片热分析,仿真出3D温度场;利用颜色映射技术在温度场与颜色之间建立起对应关系,以实现数据的可视化;基于CUDA架构,使用GPU众线程大规模并行绘制技术,对3D温度场实时绘制进行了加速研究;将以上研究集成为一个3D温度场实时可视化原型系统。大量实验表明:3D芯片温度场实时可视化系统能够提供实时的动态可视化温度分析,与CPU绘制相比,基于CUDA的GPU绘制可以获得86倍的加速。 Temperature is one important design constraint in three -dimensional (3D) integration. The visualiza- tion of temperature field has an important significance for 3D - Chip thermal design and task scheduling. In order to analyze the temperature distribution on 3D -Chip in real -time visualization, this work has carried out following re- searches: Successive over relaxation (SOR) algorithm is used to parallel the full -chip thermal analysis, and simu- late the 3D temperature field; The color mapping technology is used to establish corresponding relationship between the temperature field and color, and to realize the visualization of data ; With GPU many threads, CUDA -based massively parallel rendering technology is used to accelerate the real - time rendering of 3D temperature field ; The a- bove researches are integrated into a real -time visualization prototype system of 3D temperature field. A large num- ber of experiments show that the real - time visualization system of 3D - Chip temperature field can provide real - time dynamic visual temperature analysis. Compared with CPU rendering, CUDA -based GPU rendering can achieve 86 times acceleration.
出处 《计算机仿真》 CSCD 北大核心 2015年第8期289-293,共5页 Computer Simulation
基金 国家自然科学基金(61274033 61271198 61301146) 国家"八六三"高技术研究发展计划(2009AA01Z126)
关键词 三维芯片 科学可视化 并行绘制 3D chip Scientific visualization Parallel rendering
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  • 1LUO Zuying,CAI Yici,Sheldon X.-D Tan,HONG Xianlong,WANG Xiaoyi,PAN Zhu,FU Jingjing.Time-domain analysis methodology for large-scale RLC circuits and its applications[J].Science in China(Series F),2006,49(5):665-680. 被引量:13
  • 2骆祖莹,钟燕清.VLSI晶体管级时延模拟方法[J].计算机辅助设计与图形学学报,2006,18(12):1855-1860. 被引量:5
  • 3骆祖莹.芯片功耗与工艺参数变化:下一代集成电路设计的两大挑战[J].计算机学报,2007,30(7):1054-1063. 被引量:17
  • 4Zhan Y, Goplen B, Sapatnekar S S. Electro-thermal analysisand optimization techniques for Nano-scale integratedcircuits//Proceeding of the Asia and South -Pacific DesignAutomation Conference. Yokohama, 2006:219-222. 被引量:1
  • 5Qian H F, Nassif R, Sapatnekar S S. Random walks in asupply network//Proceedings of the 40th Design AutomationConference. Anaheim,CA, 2003:93-98. 被引量:1
  • 6Zhong Y,Wong D F. Fast Algorithms for IR drop analysis inlarge power grid//Proceedings of the International Confer-ence on Computer Aided Design. San Jose,2005:351-357. 被引量:1
  • 7Ferzli I A,Najm F N. Statistical verification of power gridsconsidering process-induced leakage current variations//Proceedings of the International Conference on ComputerAided Design. San Jose, 2003:770-777. 被引量:1
  • 8Luo Z Y,Tan S X D. Statistic analysis of power/groundnetworks using single-node SOR method//Proceedings of theInternational Symposium on Quality Electronic Design. SanJose, 2008; 867-872. 被引量:1
  • 9Wang T Y,Lee Y M,Chen C C P. 3D thermal-ADI-Anefficient chip-level transient thermal simulator//Proceedingsof International Symposium on Physical Design. Monteray,2003:10-17. 被引量:1
  • 10Yang Y H, Zhu C Y, Gu Z Y et al. Adaptive multi-domainthermal modeling and analysis for integrated circuit synthesisand design//Proceedings of the International Conference onComputer Aided Design. San Jose, 2006:575-582. 被引量:1

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