摘要
提出了一种用于OTN分析仪的伪随机序列模块的设计方案,通过对前两种伪随机序列生成方案的分析,发现其固有的缺点无法满足10b G/s的高速传输要求,从而在其基础上提出了第三种伪随机序列生成方案满足了时序和数据间插排列的要求。实现了ITU-T G.709,O.15x等相关建议要求的各种伪随机序列,并能够检测序列中是否存在误码和告警信息。通过利用Verilog语言编写相关代码,利用Modelsim仿真工具进行了功能验证并与相关仪表或设备对接测试,表明该方案是可靠的、正确的。
A design scheme of PRBS module for OTN analyzer is presented. By the analyzing of the two scheme of pseudo random sequence generator, it found that its inherent shortcomings can＇t meet the requirements of 10Gb/s high speed system.Then, the third scheme of pseudo random sequence generator is proposed to meet the requirements of timing and the requirements data interleave arrangement between byte on the ba- sis of the first two schemes. According to the suggestion of ITU-T G.709,0.15x, it can generate all kinds of sequences and can check the errors and alarm in sequences. The code has been coded in Verilog and simulated with NC-VERILOG software. The module has been certificated with other analyzer and relational equipment. The result show that the scheme is correct and reliable.
出处
《光通信技术》
北大核心
2015年第8期19-22,共4页
Optical Communication Technology
基金
江苏省自然科学基金(BK20130418)资助
江苏省高校自然科学研究项目(13KJB470001)资助
淮安市应用研究与科技攻关计划(工业)指导性项目(HAGZ2014006)资助
淮安市科技支撑项目(SN13047)资助
