摘要
随着现代高速电路设计的发展,DDR2因其内存强大的预读取能力成为许多嵌入式系统的选择。然而,DDR2的仿真工作不仅繁琐耗时量大,对EMI的仿真也比较困难,给PCB设计也带来了大量的工作难点。文中针对DDR2高速电路中存在的信号完整性问题进行了分析,提出了PCB设计要点。并以单个DDR2存储器与控制器间的PCB设计为例,对如何在减少仿真工作的情况下成功完成一个可用的设计进行了论述。
With the development of modern high speed circuit design, DDR2 has become more designers＇ choice due to the great pre-reading capability of its memory. However,DDR2 simulation is time consuming,and its simulation of EMI is difficult,which constitute difficulties for PCB design. The problem of signal integrity in high speed circuit DDR2 is analyzed in detail and the key points of design of PCB are put forward. Taking a PCB design of a single DDR2 memory with a controller for instance,this paper describes how to complete an available design successfully with decreased simulation work.
出处
《电子科技》
2015年第4期132-134,138,共4页
Electronic Science and Technology
