摘要
针对自适应权重方法在立体匹配应用时计算复杂度高,不易于实时实现的情况,通过对原算法进行权值估计改进、算法并行化设计降低计算复杂度,并应用模块并行化设计和流水线处理,提出了一种适于硬件实现的自适应权重代价聚合架构。通过Census变换计算初始匹配代价,应用改进的自适应权重方法进行并行双通道代价聚合得到可靠匹配代价,利用左右一致性检测、亚像素插值优化得到稠密视差图,实现立体匹配。整个匹配流程在单片FPGA上实现,对于大小为640×480的左右图像,系统时钟频率为60MHz情况下,实现每秒处理72帧。实验验证表明,该算法结构简单,复杂度低,适于硬件实现。
To overcome the high computational complexity and the difficulty of real-time application, a hardware implementation architecture for the adaptive support-weight approach of cost aggregation was proposed. It reduced the complexity of the original algorithm by improving of weights estimation and paralleling algorithm. Furthermore it used the hardware sub-module parallelism and pipelined structure to improve performance. The initial cost was calculated by Census transform and the reliable cost was got with the improved adaptive support-weight approach using a two pass method in parallel. After left-right consistency check and sub-pixel interpolation, a dense disparity map could be obtained to implement the stereo matching. The entire stereo matching process was realized using a single chip of Field Programmable Gate Array （FPGA）. The matching process was capable of generating disparities at more than 72 frames per second on 640×480 images when clocked at 60 MHz. The experiments presented that the proposed algorithm with concise structure and low complexity was suitable for the hardware implementation.
出处
《系统仿真学报》
CAS
CSCD
北大核心
2014年第9期2079-2084,2090,共7页
Journal of System Simulation
基金
国家自然科学基金(60970157)
辽宁省教育厅一般科技项目(L2012003)
